Genetic Programming and Evolvable Machines, 5, 11–29, 2004 # 2004 Kluwer Academic Publishers. Manufactured in The Netherlands. Evolutionary Algorithms and Their Use in the Design of Sequential Logic Circuits B. ALI b.ali@napier.ac.uk A. E. A. ALMAINI a.almaini@napier.ac.uk School of Engineering, Napier University, 10 Colinton Road, Edinburgh EH10 5DT, UK T. KALGANOVA tatiana.kalganova@brunel.ac.uk Electrical and Computer Engineering Department, Brunel University, Uxbridge, Middlesex UB8 3PH, UK Submitted March 26, 2002; Revised April 12, 2003 Abstract. In this paper an approach based on an evolutionary algorithm to design synchronous sequential logic circuits with minimum number of logic gates is suggested. The proposed method consists of four main stages. The first stage is concerned with the use of genetic algorithms (GA) for the state assign- ment problem to compute optimal binary codes for each symbolic state and construct the state transition table of finite state machine (FSM). The second stage defines the subcircuits required to achieve the desired functionality. The third stage evaluates the subcircuits using extrinsic Evolvable Hardware (EHW). During the fourth stage, the final circuit is assembled. The obtained results compare favourably against those produced by manual methods and other methods based on heuristic techniques. Keywords: sequential circuits, state assignment, genetic algorithm, evolvable hardware 1. Introduction Design is the process of translating an idea into a product that can be manufactured. In the design of electronic circuits, this implies a product formed from electronic components, software and electromechanics. Effective design allows this translation to be done quickly, cheaply and accurately to produce a product that is fit for the purpose. The top–down automatic design method of electronic circuits is generally a complex task requiring knowledge of a large collection of domain specific rules. The process of implementing a digital electronic circuit in hardware has typically involved the following stages: (1) transforming the original logical specification into a form suitable for the target technology; (2) minimising and optimising the representation with respect to user defined constraints; (3) carrying out technology mapping onto the target device. The final stage typically involves placing and routing of component gates, which comprise the complete design [1, 2]. It should be emphasised that during all these stages great care has to be taken to maintain the logical functionality of the original circuit specification. Hence, there is a demand for effective tools that perform some of the design tasks leaving the designer to concentrate on issues of performance optimisation. The complexity of the electronic design search space has encouraged the use of Evolutionary Electronic Design (EED)