Analyzing communication overheads during hardware/software partitioning J. Javier Resano * , M. Elena Pe ´rez, Daniel Mozos, Hortensia Mecha, Julio Septie ´n Departamento de Arquitectura de Computadores y Automa ´tica, Universidad Complutense de Madrid, Ciudad Universitaria, Madrid 28040, Spain Abstract Current partitioning codesign tools often simplify the communication channel features by working with generic abstract channels, which in a following step, are mapped into the actual ones. However, this mapping process can critically affect the performance of a solution. Hence, we have developed a novel methodology that studies the communications in depth, taking into account the actual channel features from the first step. With this methodology we have optimised the design-space exploration of a partitioning tool, achieving up to a 2.5 performance speed-up, while increasing the time needed to perform the partitioning by less than 20%. q 2003 Published by Elsevier Ltd. Keywords: Hardware/software partitioning; Codesign system; Estimations 1. Introduction and previous work Hybrid Architectures, composed by a software (SW) processor and a configurable hardware (HW) coprocessor, are becoming more and more common. One of the greatest challenges when dealing with this kind of hybrid architec- tures is how to optimally distribute the computation between the HW and the SW processing elements. This problem is referred in literature as Hardware/Software (HW/SW) partitioning. Hybrid systems present a trade-off between the high performance of specific HW circuits and the low cost of SW processors. However, in such systems, communications are often a system performance bottleneck, even more when both HW and SW performance are improving much faster than communi- cation channels do. Most of the existing work on HW/SW partitioning considers that abstract channels carry out communications between tasks in different platforms [1]. Hence, during the partitioning process, the actual features of the communi- cation channels are neglected. Once the partitioning has been done, the abstract channels have to be mapped into one or more physical channels (e.g. a system bus). This process is called communication synthesis. In Ref. [2], the best bus bandwidth for mapping the abstract channels is selected. In Refs. [3,4], more complex interconnection topologies are allowed. In Ref. [5], initially a bus is selected, and then communications are scheduled, trying to minimize both the HW cost and the execution time. [6] addresses the problem of generating the communication topology for systems that should meet hard real-time constraints. All these approaches work with abstract communication channels, although they consider some physical features during the communication synthesis process. Once obtained, the abstract interconnection topology has to be mapped into an actual one. In Ref. [7], a useful tool for this mapping is presented, that generates automatically the drivers and a DMA controller for a given communication application. Ignoring the properties of communication channels often leads to an inefficient design space exploration, since it is not possible to estimate correctly the communication time, or the impact of the access conflicts to these channels on the system performance. In Ref. [8], simple models for some communication platforms are presented (USB, PCI buses, packing, burst transmission mode, etc.). A model is also given to estimate the area needed to implement the communication drivers. Moreover, these models are integrated within the HW/SW partitioning, so communication timing and area trade-offs are studied during the design space exploration. However, 0026-2692/03/$ - see front matter q 2003 Published by Elsevier Ltd. doi:10.1016/S0026-2692(03)00168-X Microelectronics Journal xx (2003) xxx–xxx www.elsevier.com/locate/mejo * Corresponding author. E-mail addresses: javier1@dacya.ucm.es (J.J. Resano), eperez@dacya. ucm.es (M.E. Pe ´rez), mozos@dacya.ucm.es (D. Mozos), horten@dacya. ucm.es (H. Mecha), jseptien1@dacya.ucm.es (J. Septie ´n). ARTICLE IN PRESS