ARPA - An Open Source System-on-Chip for Real-Time Applications Arnaldo S. R. Oliveira, Valery A. Sklyarov, Ant´ onio B. Ferrari Universidade de Aveiro / IEETA Campus Universit´ ario de Santiago, Aveiro - Portugal arnaldo@det.ua.pt, skl@det.ua.pt, ferrari@det.ua.pt Abstract This paper describes the Advanced Real-time Processor Architecture (ARPA) project. The goal of this work is to create an open-source System-on-Chip model for real-time applications. The main component of the SoC is a MIPS32- based RISC processor. It is implemented using a pipelined simultaneous multithreading structure that supports the ex- ecution of more than one thread or task at a time. The syn- ergy between pipelining and simultaneous multithreading allows combining the exploration of Instruction Level Par- allelism and Task Level Parallelism, hide the context switch- ing time and reduce the need of employing complex specu- lative execution techniques to improve the performance of the pipelined processor. A fundamental component of the ARPA SoC is the Operating System Coprocessor, which im- plements in hardware some of the operating systems func- tions, such as task scheduling, switching, communication and timing. The proposed architecture allows building high performance, time predictable and power efficient proces- sors optimized for embedded real-time systems. 1. Introduction The number of transistors on a single chip has increased considerably over the last decades. The recent advances in integrated circuit (IC) technology has allowed the con- struction of complex Systems-on-Chip (SoC) and the man- ufacturing of large field programmable logic devices, such as FPGAs. FPGAs with the equivalent logic capacity of millions of gates are now available at reasonable price and are considered a strong alternative to custom ICs (ASICs), mainly due to its reconfigurability, fast design cycles and low NRE costs. Assuming the continuous evolution of the IC technology, the next generation of processors will reach, by the year 2010, the 10 billions of transistors on a single chip. The mission of the engineers and computer architects is to find the best way to use efficiently this huge number of transis- tors, which obviously depends on the application domain. The advances in computer architecture during the last decade led to the construction of very fast and extremely complex superscalar processors, employing advanced tech- niques to improve performance, such as superpipelining, branch prediction/speculation, out-of-order/predicated ex- ecution and sophisticated memory hierarchies. However, these techniques are also responsible for much of the power consumption and for the non deterministic performance of nowadays computers. Furthermore, their implementation require considerable hardware resources. Although, they were successfully applied to improve the performance of desktop computers, they are not appropriate for embedded real-time systems because predictable performance and in some cases low power consumption are considered impor- tant properties for this class of systems. In this paper we suggest an approach to explore the huge integration capac- ity currently available, to build optimized, time predictable and power efficient SoCs for embedded real-time systems. This paper contains 8 sections. Section 1 is this intro- duction. Sections 2 and 3 present the motivations and the objectives of this work, respectively. Section 4 refers some related work and discusses the similarities and differences with our work. The main characteristics of the ARPA SoC architecture are described into section 5. The current im- plementation status and results are shown in section 6. Sec- tion 7 describes the design flow for applications based on the ARPA SoC. Finally, section 8 completes this paper, pre- senting the concluding remarks and some open issues. 2. Motivation Embedded hard real-time systems are typically reactive systems consisting of a set of concurrent tasks executing pe- riodically or aperiodically with a well defined deadline. The execution is usually performed on a single processor, which is able to execute only one task at a time. A Real-Time exec- utive or Operating System (OS/RTOS) is normally used to manage the execution of the tasks, performing the following activities: