Typeset with jjap2.cls <ver.1.0> Regular Paper Constrained Parity-Check Code and Post-Processor for Advanced Blue Laser Disk Kui Cai 1 * , Kees A. Schouhamer Immink 2 † , Jan W. M. Bergmans 3 ‡ , and L. P. Shi 1 § 1 Data Storage Institute, DSI Building, 5 Engineering Drive 1, Singapore 117608 2 Turing Machines Inc., The Netherlands. 3 Technical University of Eindhoven, The Netherlands. We propose an advanced detection approach based on capacity approaching constrained parity-check codes and multiple-error-event correction post-processing for high density blue laser disk systems. Simulation results with the blu-ray disc show that an increase of 5GB in capacity can be achieved over the standard system. KEYWORDS: Constrained codes, finite state machine (FSM), parity-check codes, post-processor. 1. Introduction Coding and signal processing have become increasingly important and powerful parts of optical recording systems. The reception techniques for blue laser disk systems (i.e. the blu-ray disc (BD) 1) and high-definition digital versatile disc (HD-DVD)) 2) are significantly different from that used in compact disc (CD) and DVD. For example, the threshold detector is replaced by more powerful Viterbi-like bit detectors, and the minimum runlength constraint 3) is reduced from d = 2 to d = 1. Improvements have also been made in pre-processing, which increase the recording capacity of BD from the standard 23.3-25-27 GB to 35 GB on a single layer. 4) In this paper, we propose an advanced detector with a novel capacity approaching con- strained parity-check (PC) code and a multiple-error-event correction post-processor, for blue laser disk systems with even higher capacity. A block diagram of the d = 1 channel with PC codes and post-processing is shown in Fig. 1. The d = 1 constrained PC encoder adds the d = 1 constraint as well as parity-check constraints on fixed-length segments of user data. Violation of the parity-check constraints in the detected bit sequence enables error detection. For error correction, a post-processor working on channel side information is used. In this way, dominant short error events at the output of the channel detector can be corrected by the PC code with very low redundancy, and the correction capacity loss of the outer error correction code (ECC) is reduced. Therefore, this approach provides an efficient solution to * Email address: Cai Kui@dsi.a-star.edu.sg † Email address: immink@turing-machines.com ‡ Email address: J.W.M.Bergmans@tue.nl § Email address: Shi Luping@dsi.a-star.edu.sg 1/15