A Modulator-based Multistage Free-space Optical Interconnection System A.G.Kirk' , D.V.Plant', T.H.Szymanski2, Z.G.Vranesic3, J.A.Trezza4, F.A.P.Tooley5, D.R.Rolston', M.H.Ayliffe', F.Lacroix' , D.Kabal6, B.Robertson7, E.Bemier6, D.F.-Brosseau1 , F.S.J.Michael' and E.L.Chuah' 1. Department ofElectrical and Computer Engineering, McGill University, Montreal, Canada; 2. Department ofElectrical and Computer Engineering, McMaster University, Hamilton, Canada; 3. Department ofElectrical and Computer Engineering, University of Toronto, Toronto, Canada; 4. Sanders, Lockheed Martin, Nashua, New Hampshire, U.S.A. ; 5. Department ofPhysics, Heriot- Watt University, Riccarton, Edinburgh, UK.; 6. Now with Nortel Networks, Ottawa, C'anada; 7. Now with Thomas Swan & C'o. Ltd., ainbridge University, Cambridge UK. ABSTRACT We describe the design and implementation of a free-space optical interconnect for multi-processor and backplane applications. The system is designed to interconnect 4 nodes in a unidirectional ring, with a total of 256data channels propagating from node to node. Each node contains an array 5 12 GaAs electro-absorption modulators and 512 photodetectors, hybridly attached to a silicon integrated circuit. Light is relayed between nodes with a rigid micro-optical system. System results are presented. Keywords: Free-space optical interconnect, multiprocessor. backplane, micro-optics, quantum-confined Stark effect modulators, optoelectronic-VLSI, diffractive optics. 1. INTRODUCTION Parallel optical interconnects are capable of providing high bandwidth communication links both within and between high performance electronic systems. In the commercial arena, several companies now supply optical fiber ribbon-based parallel optical data links (PODLs) of 8 to 12 channels, operating at data rates of up to 2.5 Gb/s per channel over distances of 100- 1 000 m (depending on bit rate). However, there are applications where many more parallel channels are required in an architecture that is more complex than a simple point-to-point link. One such application is the interconnection of processors and memory within multiprocessor computers. The class of processor architectures described as non uniform memory access or NUMA have many important advantages [1]. In such an architecture processors have access to both local and non-local memory. All of the processes are able to access all of the memory. In order to ensure that a processor is not operating on memory that has since been modified by another processor, cache coherency is required. In a NUMA architecture a low latency high bandwidth interconnection network is advantageous in order to broadcast information about the changing memory state to all processors. Node 4 Node 2 In Optics in Computing 2000, Roger A. Lessard, Tigran Galstian, Editors, SPIE Vol. 4089 (2000) 0277-786X/0O/$15.0O 449 Figure 1. Schematic representation of a multihop optical ring interconnection. Each node contains a processor and a memory.