3250 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 7, JULY 2014 Letters Y-Source Impedance Network Yam P. Siwakoti, Poh Chiang Loh, Frede Blaabjerg, and Graham E. Town Abstract—This letter introduces a new versatile Y-shaped impedance network for realizing converters that demand a very high-voltage gain, while using a small duty ratio. To achieve that, the proposed network uses a tightly coupled transformer with three windings, whose obtained gain is presently not matched by existing networks operated at the same duty ratio. The proposed impedance network also has more degrees of freedom for varying its gain, and hence, more design freedom for meeting requirements demanded from it. This capability has been demonstrated by mathematical derivation, and proven in experiment with an example of a single- switch dc–dc converter. Index Terms—AC-AC power conversion, dc-ac power conver- sion, dc-dc power conversion, impedance network, Y-source net- work. I. INTRODUCTION I N the past decade, many impedance networks have been re- ported for realizing converters with high boost ability. The most prominent among them would probably be the Z-source impedance network introduced in [1]. Although the Z-source impedance network was first tested with a dc–ac inverter, its usage is not limited, and has in fact been tried with many types of energy converters like demonstrated in [2]–[4] for a dc–dc converter, [5] for an ac–ac converter, and [6] for an ac–dc con- verter. This flexibility has also been shown with other impedance networks proposed subsequently, including the quasi-Z [7], [8], embedded-Z [9], [10], series-Z [11], switched-inductor [12], [13], tapped-inductor [14], cascaded [15], T-source [16], [17], trans-Z-source [18], and Γ-source [19] networks. Among the mentioned, the latter three networks are slightly more unique in the sense that they use coupled transformers with two windings for achieving higher voltage gains, while keeping their component counts low. They differ only in their winding placements, which although are simple rearrangements, lead to different winding requirements and characteristic features that might suit certain applications [19]. It is thus generally not fair to favor any particular networks. Rather, it is more appropriate to design an alternative that can merge all preferred characteris- tics of the existing networks. For that, the Y-source impedance Manuscript received August 26, 2013; revised November 7, 2013; accepted December 16, 2013. Date of current version February 18, 2014. Recommended for publication by Associate Editor R. Ayyanar. Y. P. Siwakoti and G. E. Town are with the Department of Engi- neering, Macquarie University, Sydney, N.S.W. 2109, Australia (e-mail: yam.siwakoti@mq.edu.au; graham.town@mq.edu.au). P. C. Loh and F. Blaabjerg are with the Department of Energy Tech- nology, Aalborg University, Aalborg 9220, Denmark (e-mail: pcl@et.aau.dk; fbl@et.aau.dk). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2013.2296517 network has been proposed in this letter, whose example real- ization as a single-switch dc–dc converter has been tested in the laboratory. II. MATHEMATICAL DERIVATION The Y-source impedance network is shown in Fig. 1(a), which in its elementary form, consists of an active switch SW, a pas- sive diode D 1 , a capacitor C 1 , and a three-winding transformer (N 1 ,N 2 ,N 3 ) for creating a high voltage boost, while using a small duty ratio. As the transformer is tied directly to SW and D 1 , its coupling must be tightly ensured to minimize leakage inductances seen at its windings. This can be done by follow- ing the winding style associated with a bifilar coil [20], which is also the method used in [18]. However, in [18], only two wire strings are simultaneously wound to give two windings, while for the Y-source transformer, three strings are wound to form three windings. Upon ensuring that, equivalent circuits shown in Fig. 1(b) and (c) can be drawn for representing the Y-source impedance network when it is in two different operat- ing states. The former corresponds to SW turned ON with D 1 reverse-biased. Its circuit expressions can hence be written as (1), where n 12 = N 1 /N 2 and n 13 = N 1 /N 3 are the turns ratios of the transformer V C 1 + v L /n 12 − v L /n 13 =0 ⇒ v L = n 12 n 13 n 12 − n 13 V C 1 . (1) By next turning OFF SW with D 1 conducting in turn like shown in Fig. 1(c), the circuit expressions change to (2) V In = v L + V C 1 + v L /n 12 ⇒ v L = n 12 n 12 +1 (V In − V C 1 ) . (2) State-space averaging performed on (1) and (2) then results in (3) for computing voltage V In across capacitor C 1 . In (3), d ST represents the normalized on-time of SW, which throughout this letter, is referred to as its duty ratio V C 1 = V In (1 − d ST ) /  1 − n 12 (n 13 + 1) d ST n 12 − n 13  . (3) Referring now to the output voltage v O of the network, its peak value ˆ v O during the off-interval of SW can be written as (4), from which the network voltage gain G v =ˆ v O /V In can be determined in terms of the transformer winding factor K defined as K = N 3 +N 1 N 3 −N 2 ˆ v O = V In −  1+ 1 n 13  v L = V In −  n 13 +1 n 13  ×  n 12 n 12 +1  (V In − V C 1 ) 0885-8993 © 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. 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