Voltage Pulse Stress Effect on Gate stack TDDB distributions at nanometric scale: Consequence on Aging by ESD R. Foissac, S. Blonkowski, M. Gros-Jean STMicroelectronics 850 rue Jean Monnet, 38926, Crolles, France +33 4 38 78 03 97, romain.foissac@cea.fr M. Kogelschatz, Univ. Grenoble Alpes, Lab. LTM-UMR CNRS (CEA-LETI/Minatec), 17 avenue des martyrs, 38054 Grenoble, France Abstract— The effects of a voltage pulse stress on time to breakdown and breakdown voltage distributions of a 1.4nm thick SiON layer are investigated at nanometric scale using an atomic force microscope in conduction mode under ultra-high vacuum. Thanks to the reduced tip/sample contact area, a large window of voltage pulse amplitude and length is allowed. It is found that the pre-stress pulse does impact the slope of the cumulative failure distribution but has no effect on the voltage acceleration factor. Using this assumption an extrapolation formula is given to predict the decrease of the time to breakdown as a function of the pre-stress pulse parameters. ESD; C-AFM; Dielectric Breakdown I. INTRODUCTION With the downscaling of microelectronics devices, new questions have been raised concerning the impact of electrostatic discharge (ESD) on ultra-thin gate oxide lifetime. Effects of ESD on CMOS devices has been widely studied [1 - 5]. It has been shown that the main statistical properties i.e. Weibull slope and acceleration factor observed for usual Time Dependent Dielectric Breakdown (TDDB) remain unchanged [4, 5] at the time range of ESD. However the impact of a pre- stress pulse on TDDB distributions seems more pertinent to study the effect of an isolated ESD on the Time to Breakdown (t BD ). According to [6, 7] the impact of such a pre-stress pulse seems to slightly affect the Weibull slope. At nanometric scale, thanks to the area scaling effect, the Breakdown Voltage (V BD ) is sufficiently high [8] to measure the impact of larger preset voltage pulse than at a device scale. Atomic Force Microscopy used in conductive mode (C-AFM) is a powerful technique to study such a local phenomenon as the dielectric breakdown. Due to the reduced tip/sample contact area, the tunneling current is decreased providing new insights in pre breakdown current characteristics [9, 10]. The nanoscale surface of the C-AFM tip allows a large range of pulse amplitude and width without being destructive for the oxide layer. In this study C-AFM in ultra-high vacuum is used to study the effect of the pre-stress pulse height and duration on the TDDB and V BD statistic distributions. An extrapolation formula for the the time for which 63% of devices have failed, t 63% evolution as a function of the pulse parameters, i.e. ESD aging as a function of the pre-stress pulse characteristics will be deduced. II. EXPERIMENTAL DETAILS In the present study, C-AFM electrical tests have been carried out on a 1.4nm thick SiON layer on Silicon substrate (5.07 x 10 15 cm -3 , p-type). The silicon oxinitride layer has been prepared in the following way: after a HF-SC1 clean, a thin SiON interfacial layer was formed by oxidation of the silicon substrate with a 800°C RTO, followed by Inductively Coupled Plasma (ICP) nitridation and a post nitridation anneal at 1000°C. C-AFM measurements were performed at room temperature with an Omicron AFM/scanning tunneling microscopy system under UHV (<10 9 Torr) with conductive diamond tips (B doped). The AFM tip was used as a grounded top electrode (tip area = 10 nm² [8]), and a negative voltage was applied to the substrate. The current was recorded using a Keithley 6430 equipped with a sub-femtoampere sourcemeter. Electrical contact between the sample and the stage was assured with indium solder, and all of the samples were outgassed at 150°C for 3 h at 4x10 8 Torr. The electrical measurements were done in contact mode (normal force = 20 nN) while applying a constant voltage to the stack. Topographic images were performed in contact mode using the diamond tip. Current mapping was performed on the dielectric with a constant tip voltage while the tip is scanning the layer surface, the current was recorded by the AFM software Iscala. III. EXPERIMENTAL RESULTS In this paper the effect of a pre-stress pulse is characterized by measuring either the breakdown voltage by applying a Ramp Voltage Stress (RVS) or the time to breakdown by applying a Constant Voltage Stress (CVS). For each point of the distributions the tip is stopped on the oxide, a pre-stress pulse is triggered followed by RVS or CVS until the dielectric breakdown is detected. The pulsed voltage pre-stress is supplied by a DS345 function generator from Stanford Research Systems and the CVS and RVS characteristics are obtained by using a Keithley 6430 electrometer (Fig.1). French Network Renatech 978-1-4799-3317-4/14/$31.00 ©2014 IEEE GD.5.1