Advanced SiGe BiCMOS and CMOS platforms for Optical and Millimeter-Wave Integrated Circuits P. Chevalier, D. Gloria, P. Scheer, S. Pruvost, F. Gianesello, F. Pourchon, P. Garcia, J.-C. Vildeuil, A. Chantre, C. Garnier, and O. Noblanc STMicroelectronics FTM – Analog & RF Advanced R&D 850 rue Jean Monnet, F-38926 Crolles, France pascal.chevalier@st.com S.P. Voinigescu, T.O. Dickson, E. Laskin, S.T. Nicolson, T. Chalvatzis, K.H.K. Yau Edward S. Rogers Sr. Dept. of ECE University of Toronto Toronto, ON M5S 3G4, Canada sorinv@eecg.toronto.edu Abstract—This paper presents the status of most advanced CMOS and BiCMOS technologies able to address very high- speed optical communications and millimeter-wave applications. The performance of active and passive devices available on bulk Si and high-resistivity SOI is reviewed and HF characteristics of state-of-the-art SiGe HBTs and MOSFETs are compared. The performance of building blocks designed in different CMOS and BiCMOS platforms are also presented. Finally, we conclude on the suitability of different Si technologies to address such high- frequency applications. BiCMOS; CMOS; millimeter-wave circuits; optical communication I. INTRODUCTION Si-based technologies now offer competitive performance to address applications such as 60-GHz WLAN and 77-GHz automotive radar for which large volumes can be expected. This paper presents the state-of-the-art performance of active and passive devices both on bulk Si and high-resistivity (HR) silicon-on-insulator (SOI). Performances of 65-nm MOSFETs and 130-nm-based SiGe HBTs, featuring both f T (current gain cut-off frequency) and f max (maximum oscillation frequency) close to, or higher than, 200 GHz, are compared. The different design approaches for both inductors and transmission lines are discussed according to substrate choice. Next, the most advanced STMicroelectronics platforms are described, and results obtained on both digital and analog circuits above 40 Gb/s – 40 GHz are compared. Based on these results, the need for a dedicated Si platform for mm-waves operation is discussed and we conclude on the choices that appear to be the most relevant regarding performance, cost and time-to-market. II. SI-BASED HIGH-PERFORMANCE DEVICES A. Active Devices on Bulk and SOI 1) Bipolar devices: HBTs feature many advantages compared to CMOS devices such as their lower 1/f noise, higher output resistance and higher voltage capability for the same speed. Many companies now offer HBTs featuring f T ≥ 200 GHz [1]-[2]-[3]- [4] with f max sometimes ≥ 300 GHz [1]-[2]-[3]. Fig. 1 and Fig. 2 summarize the performance of ST HBTs demonstrated in the 130-nm CMOS node. While the f T vs. BV CEO chart - BV CEO being the emitter–collector breakdown voltage - is the traditional benchmark, the f max vs. BV CBO chart - BV CBO being the collector-base breakdown voltage - provides complementary information. Indeed, f max is often more suitable to reflect HF capability while BV CBO gives the maximum available breakdown voltage i.e. in the common-base configuration. Three types of E–B structures are compared on these charts: a quasi-self-aligned (QSA) using a single- polysilicon layer (SP), a quasi-self-aligned (QSA) using a double-polysilicon layer (DP), and a fully-self-aligned (FSA) using a double-polysilicon layer (DP). Two types of collectors 1 2 3 4 0 50 100 150 200 250 300 350 f T × BV CEO (GHz.V) f T × BV CEO (GHz.V) 450 300 150 QSA-SP-LC / bulk (Prod) QSA-DP-HP / bulk (Prod) FSA-DP-HP / bulk (Devt) (Proto) FSA-DP-LC / bulk (Devt) FSA-DP-LC / SOI (Devt) (Proto) f T (GHz) BV CEO (V) Fig. 1. fT – BVCEO chart built with various Si/SiGeC HBTs available in 130-nm CMOS node. Different architectures with different maturities are compared. 4 5 6 7 8 9 10 11 12 13 0 50 100 150 200 250 300 350 f max × BV CBO (GHz.V) 1800 1400 1000 QSA-SP-LC / bulk (Prod) QSA-DP-HP / bulk (Prod) FSA-DP-HP / bulk (Devt) (Proto) FSA-DP-LC / bulk (Devt) FSA-DP-LC / SOI (Devt) (Proto) f max (GHz) BV CBO (V) Fig. 2. fmax – BVCBO chart built with various Si/SiGeC HBTs available in 130-nm CMOS node. Different architectures with different maturities are compared. © 1-4244-0127-5/06/$20.00 2006 IEEE