Mixed Fluid-Heat Transfer Approach for VLSI Steady State Thermal Analysis M. Bougataya (a,c) , A. Lakhsasi (a) ,Y .Savaria (b) and D. Massicotte (c) (a) Department of Computer Science, Université du Québec à Hull, Hull, (PQ) J8X-3X7. (b) Department of Electrical and Computer Science École Polytechnique de Montréal, Montréal (PQ) H3T-1J7. (c) Laboratory of signals and integrated systems, Université du Québec à Trois-Rivières, Québec, G9A 5H7, Canada. Abstract: During the development of the integrated circuits the thermal design aspect is crucial for their safe operation. The problem of the junction overheating remains a major obstacle in front the most required performances of the electronic systems: increase of the speed operation and the components miniaturization. In both cases those results by junction overheating and associated induced higher thermal stress. The design of a reliable large and powerful processor requires the whole device coupled fluid-heat transfer thermal analysis from junction to ambient. In this case, device electrothermal behavior is principally influenced by geometry package, junction structure, and physical heat sources distribution. This paper presents a mixed fluid-heat transfer approach for thermal analysis of large VLSI (Very Large Scale Integration) devices. In this case, estimation of equivalent convection coefficient has become the major issue for device junction to ambient thermal analysis. Based on the FEM (Finite Element Method) the approach combines fluid flow and heat transfer mechanism to predict, in general, working temperature of IC (Integrated Circuit). In addition, the effect of power density, position, heat sink characteristics, during thermal response is investigated. The new approach developed can be used for accurate rating of semiconductor devices or heat sink systems during large ASIC(Application Specific Integrated Circuit) circuit design. Results comparison between proposed approach and traditional method shows that this approach is effective as a designing step. Index Terms- Thermal analysis, Heat transfer, junction temperature, VLSI, Finite Element. I- INTRODUCTION As the processor speed believes and the integration peripheral increases, the chip power increases. Thermal management becomes an increasingly significant part of the system design and for their correct operation. The final thermal constraint is the silicon temperature, which generally indicated under the name of the junction temperature, remains a major obstacle in front of the most required integrated circuits performances. The miniaturization, the power packing and the commutation frequency of the electronic components are the principal obstacles, which slow down their development. Thus, increase in the thermal peaks, and the thermal residue accumulation from one cycle to another results in the appearance of a thermal constraint in to dynamic mode, which limits their development and the realization of new powerful processor. We know that the dynamic behavior of the electronic components is completely different from the static mode. In addition, another emerging devices currently named micro electro mechanical systems (MEMS), which are expected to expand quickly, require specific packaging techniques, which have to take into account the heat dissipation constraints [2]. In this paper, the estimation of junction temperature of WSI (Wafer Scale Integration) device has become the major issue with the increase of the power density and high switching frequency. This investigation uses a thermal heat sources emplacement approach to estimate and predict working temperature of WSI chip junction. Based on different scenarios, the heat sources placement considering the junction temperature is introduced. Then the finite element analysis is used to accurate peak junction temperature prediction needed during dynamic operating of WSI. In addition, the effect of heat source placement during steady state thermal response is investigated. The approach developed can be used for WSI accurate rating and appropriate selection of heat sink systems for safe cooling. Therefore, accurate thermal junction analysis is of crucial importance in the design of WSI device due to the increasing of local power density and higher power requirement. Hence, a major feature of the thermal problem is the need to simulate a very large region of the device and substrate; in fact the package geometry often needs to be taken into account. The simultaneous solution of the three-dimensional (3-D) electro thermal problem is therefore difficult due to the need for very fine meshing of the device equations at the junctions and a need for a large simulation region to produce an accurate thermal simulation [1]. Proceedings of the 2002 IEEE Canadian Conference on Electrical & Computer Engineering 0-7803-7514-9/02/$17.00 © 2002 IEEE - 403 -