On reconfigurable tiled multi-core programming Processing cores evaluation Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andr´ e B.J. Kokkeler and Gerard J.M. Smit Computer Architecture for Embedded Systems group CTIT, Department of EEMCS, University of Twente P.O. Box 217, 7500 AE Enschede, The Netherlands Email: K.C.Rovers@utwente.nl http://caes.cs.utwente.nl/Research/?project=BeamForce Abstract—For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigurable solution, but partitioning, mapping, modelling and program- ming such systems remains an issue. A semantic model has been presented to allow the development of the model for the specification, design and implementation. The semantic model is used for partitioning the application, evaluating the consequences and mapping to an architectures. Design space exploration allows us to adapt the partitioning and mapping to an architecture or visa-versa. With tiled reconfigurable cores as basis for the architecture, this paper explores the different options for processing cores and its suitability with respect to the design flow of the semantic model approach. Trade-offs with respect to granularity depending on flexibility and efficiency allow interesting design evaluations, especially for programability. This work therefore represent an important step forward in the design flow for designing and using multi-core tiled architectures. Index Terms—Phased array, beamforming, hierarchical tiled architecture, semantic model, dataflow, functional programming I. I NTRODUCTION This paper will evaluate processing cores for use as an building block in a tiled multi-core architecture. The appli- cation domain for this architecture is high performance digital signal processing. The specific case is phased array beam- forming processing. Beamforming is characterised by high rate streaming data and dependability requirements. The most important is performance, however, that doesn’t mean energy efficiency or cost are not important. The goal is to define a generic phased array platform solution for applications areas like radar, radio astronomy or satellite receivers (DVB-S). A reconfigurable scalable system is envisioned as to achieve these goals. Therefore we will focus on (reconfigurable) digital processing. [1] We will first summarise the beamforming application and the rationale for a reconfigurable tiled multi-core architecture. Section II will then discuss the design flow for using such architectures by partitioning and mapping. This will give us the environment in which the processing core will operate, which is used to evaluate different option in section III. Many of those have been used or are evaluated for use for the beamforming application. None of those however are suitable as a tile in the proposed architecture. Therefore a new core is proposed, the Fig. 1. Beamform or radiation pattern FlexCore, to be used to fulfil this task in section IV. As the signal processing is all sample based, we prefer course-grained reconfigurable hardware operating at word level. The goal is to achieve the efficiency of an FPGA/ASIC with the flexibility and ease of use of an DSP/GPP by applying a reconfigurable core matched to the tiled architecture and application domain. A. Array antenna receiver platform Phased array beamforming systems use multiple antennas in an array to make a receiver directional, i.e. form a electro- magnetic beam into a certain direction (Fig. 1). The direction of the beam can be influenced by beamsteering. This allows one to point at the direction of interest in order to reduce interference or reject interferers, use less (wasted) energy or provide higher throughput for example. A block diagram of a typical phased array receiver is shown in figure 2. Assume a single omni-directional wave source, emitting a spherical waveform in time and space s(t,l) = A · cos(ωt ± kl), with A the amplitude, ω the frequency, k the wave number, t time and l the path length from the source. For a source in the far field perpendicular to the array, the wavefront is considered planar. If the plane of the array is not perpendicular, the wavefront arrives at different times at the antennas (see fig. 2). If the antennas are placed a distance d apart and the wavefront arrives at an angle ϑ incident to the array, the wavefront travels a distance d · sin (ϑ) further to the next antenna, resulting in a time delay Δt = d·sin(ϑ) c between the signals (c is the propagation speed of radio waves). Depending on the frequency of the wave, this time delay results in a phase shift (Δψ = ω · Δt) giving rise