Available online at http://www.idealibrary.com on doi:10.1006/spmi.2000.0953 Superlattices and Microstructures, Vol. 28, No. 5/6, 2000 Discharge mechanisms modeling in LPCVD silicon nanocrystals using C – V and capacitance transient techniques † C. BUSSERET, A. S OUIFI ‡ , T. BARON, G. GUILLOT 1-LPM-INSA de Lyon, UMR CNRS 5511—Bât. 502, 20 Av. A. Einstein, 69621 Villeurbanne, France F. MARTIN, M. N. S EMERIA , J. GAUTIER 2- CEA-LETI/DMEL, 17 Av. des Martyrs, 38 054 Grenoble, France (Received 26 July 2000) Charging and discharging phenomena from silicon nanocrystals have been studied by means of capacitance–voltage characteristics on P-type metal-oxide-semiconductor (P- MOS) capacitors with embedded self-assembled silicon quantum dots. The dots have a floating gate behavior as shown by the hysteresis on C –V curves. The Si-dots are charged or discharged by direct tunneling of carriers through a 3 nm thick oxide. The nanocrystals could be charged by electrons or holes, depending on the charging bias conditions. The discharge is studied by constant bias method and shows a logarithmic variation with time. Retention times higher than several hours are observed. A simple model is developed in order to evaluate the electric field within the tunneling oxide layer. Then, complete sim- ulations are done for the different discharge paths. The barrier heights are extracted from the discharge data and possible confinement effects are discussed. The results confirm the high potentiality of silicon nanocrystal-floating gates for memory applications. c  2000 Academic Press Key words: discharge mechanisms, LPCVD silicon nanocrystals, C –V , capacitance tran- sient techniques. 1. Introduction In the last decade, the interest in silicon nanostructures (nc-Si) became important. Many applications such as Single Electron Transistors (SET) and Single Electron Memories (SEM) were proposed, as reviewed in [1]. The use of nc-Si is also proposed for light emitting applications [2]. Indeed, nc-Si allows one over- come some physical barriers of the MOSFET due to the size diminution. In fact, Hiramoto has proposed a transition phase before the realization of silicon nanodevices that fully utilizes the quantum and single elec- tron charging effects [3]. In this phase, new physical phenomena are positively utilized and nanodevices are merged into Ultra Large Scale Integration (ULSI). Usually compatible with the ULSI process, the nc-Si will be easily integrated into the ULSI chip. An example of these first devices is the nanocrystal memory that † This work has been carried out in the frame of CEA-LETI/CPMA collaboration with PLATO organization teams and funds. ‡ E-mail: 0749–6036/00/110493 + 08 $35.00/0 c  2000 Academic Press