IEIE Transactions on Smart Processing and Computing, vol. 5, no. 1, February 2016 http://dx.doi.org/10.5573/IEIESPC.2016.5.1.55 55 IEIE Transactions on Smart Processing and Computing Hybrid Multi–System-on-Chip Architecture as a Rapid Development Approach for a High-Flexibility System Rachmad Vidya Wicaksana Putra and Trio Adiono Integrated Circuits Laboratory, Microelectronics Center, Institut Teknologi Bandung / Bandung, Indonesia rachmad@pme.itb.ac.id, tadiono@stei.itb.ac.id * Corresponding Author: Trio Adiono Received February 20, 2016; Accepted February 25, 2016; Published February 29, 2016 * Regular Paper * Extended from a Conference: Preliminary results of this paper were presented at the ICEIC 2016. This present paper has been accepted by the editorial board through the regular reviewing process that confirms the original contribution. Abstract: In this paper, we propose a hybrid multi–system-on-chip (H-MSoC) architecture that provides a high-flexibility system in a rapid development time. The H-MSoC approach provides a flexible system-on-chip (SoC) architecture that is easy to configure for physical- and application- layer development. The physical- and application-layer aspects are dynamically designed and modified; hence, it is important to consider a design methodology that supports rapid SoC development. Physical layer development refers to intellectual property cores or other modular hardware (HW) development, while application layer development refers to user interface or application software (SW) development. H-MSoC is built from multi-SoC architectures in which each SoC is localized and specified based on its development focus, either physical or application (hybrid). Physical HW development SoC is referred to as physical-SoC (Phy-SoC) and application SW development SoC is referred to as application-SoC (App-SoC). Phy-SoC and App-SoC are connected to each other via Ethernet. Ethernet was chosen because of its flexibility, high speed, and easy configuration. For prototyping, we used a LEON3 SoC as the Phy-SoC and a ZYNQ-7000 SoC as the App-SoC. The proposed design was proven in real-time tests and achieved good performance. Keywords: H-MSoC, High-flexibility system, Rapid development, Physical-SoC, Application-SoC 1. Introduction System-on-chip (SoC) is an integrated circuit (IC) that integrates many electronic components into a single complete system. This technology has driven many developments in electronics and in a broad spectrum of applications, especially in the embedded systems world. Many devices and gadgets for many levels of applications were basically established from SoC technology. Thus, we can conclude that SoC technology has been indispensable to daily life. Most SoC developments are driven by evolution in applications [1]. Each SoC design methodology faces unique challenges, with solutions based on the purpose of the application [2]. A lot of research into SoC technology has proven this [3-7]. Meanwhile, concerns about SoC technology are always the same: high performance speed, a small footprint, low power consumption, high flexibility and configurability, and a short time-to-market [8]. Thus, much of the research has been conducted in order to answer those challenges. Traditionally, SoC design has focused on the com- putational aspect of modular hardware (HW) design or intellectual property (IP) components. Those modular hardware components will be plug-and-play based on the bus interface standard. This method will tend to make the area occupation of the SoC larger and larger, along with the increasing number of hardware components. According to Marculescu et al. [9], as the number of SoC components increases, architecture design of the communications aspect will dominate, defining several important para- meters in the SoC, such as area occupation size, perfor-