IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 57, NO. 5, MAY 2009 1229 A Hybrid Decoder for Block Turbo Codes A. Al-Dweik, Senior Member, IEEE, S. Le Goff, and B. Sharif, Senior Member, IEEE Abstract—We propose a novel iterative decoder for block turbo codes (BTCs). The proposed decoder combines soft-input/soft- output (SISO) and hard-input/hard-output (HIHO) constituent decoders in order to obtain better error performance and reduce the computational complexity compared to classical BTC decoders. We show that the new decoder, called ’hybrid decoder’, offers a better complexity/performance tradeoff than a classical BTC decoder. Index Terms—Block turbo codes, turbo product codes, soft decision decoding, hard decision decoding. I. I NTRODUCTION T URBO product codes (TPCs) were developed to achieve powerful error correction with reasonable decoding com- plexity. These codes offer an error performance that is close to Shannon’s theoretical limit over additive white Gaussian noise (AWGN) channels [1]. The iterative decoding of TPCs is traditionally performed using several soft-input/soft-output (SISO) decoders whose computational complexity can be considerable. For this reason, the complexity reduction of SISO decoders has remained an attractive research topic. Most of the work reported in the literature is focused on reducing the complexity without affecting the bit error rate (BER). As an example, the Chase-II decoder, originally used in [1], was replaced by the Kaneko’s algorithm in [2] to minimize the search for the most likely row/column codeword. Although this technique was able to reduce the number of hard decision decoding (HDD) operations performed, the number of arithmetic operations remained fixed. An efficient implemen- tation of the Chase-II decoder is proposed in [3] where the complexity is reduced substantially with no BER degradation. This technique is particularly attractive for designing one- error-correcting codes. In [4], complexity reduction and coding gain improvement were achieved by limiting the candidate codewords in the Chase-II decoder to the ones that satisfy a certain Hamming threshold. The main limitation of this approach is the requirement to generate the same number of candidate codewords as in a standard TPC decoder, which prevents any reduction to the number of HDDs. Moreover, the coding gain improvement is limited to about 0.2 dB at a BER of 10 -5 . Paper approved by A. K. Khandani, the Editor for Coding and Information Theory of the IEEE Communications Society. Manuscript received August 8, 2007; revised March 12, 2008. A. Al-Dweik is with the Department of Communications Engi- neering, Khalifa University, P.O. Box 573 Sharjah, UAE (e-mail: dweik@fulbrightmail.org). He is currently a Visiting Lecturer at the School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, NE1 7RU, U.K. S. Le Goff and B. Sharif are with the School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, NE1 7RU, U.K. (e-mail: {stephane.le-goff, bayan.sharif}@ncl.ac.uk). Digital Object Identifier 10.1109/TCOMM.2009.05.070107 Similar to regular block codes, TPCs can be decoded using HDD or soft decision decoding (SDD) constituent decoders. In the context of iterative decoding, such decoders are usually called hard-input/hard-output (HIHO) and SISO decoders, respectively. The HIHO decoders offer a very low complexity and high decoding speeds at the expense of BER performance. A coding gain penalty of 2 to 3 dB is typically obtained when HIHO decoding is used in place of the more complex SISO decoding [5]. In this letter, we propose a novel ’hybrid’ iterative TPC decoder using both HIHO and SISO constituent decoders. Compared to a classical TPC decoder only relying on SISO decoders, such hybrid decoder can offer a reduced complexity and/or BER performance improvement. Furthermore, the hy- brid decoder provides a high degree of design flexibility, thus allowing for an optimization of the performance/complexity tradeoff. II. TURBO PRODUCT CODES A two-dimensional TPC encoder consists of two serially concatenated binary linear block encoders, called constituent encoders, separated by a row/column interleaver. The con- stituent encoder C l (l =1, 2) has the parameters (n l ,k l ,d l ) where n l ,k l ,d l designate the codeword length, number of information bits and minimum Hamming distance between codewords, respectively. The encoding process is performed by placing (k 1 × k 2 ) information bits in an array of k 1 rows and k 2 columns [1]. The k 1 rows are encoded using code C 2 and the n 2 columns are encoded using code C 1 . Thus, a TPC codeword can be viewed as n 1 × n 2 matrix. The parameters of the product code are n = n 1 × n 2 , k = k 1 × k 2 , and d = d 1 × d 2 . In this work, we design our TPC code by using two identical binary extended BCH (eBCH) codes as constituent codes. We assume the transmission of binary phase shift keying (BPSK) symbols over AWGN channel. The codeword matrix C =(c 1,1 , ..., c n1,n2 ) is transmitted, and the corresponding received sequence R = C + G, where G =(g 1,1 , ..., g n1,n2 ) is a matrix of AWGN samples with zero mean and variance N 0 /2. The demodulator can be configured to make hard or soft decisions. If hard decisions are desired, the output of the demodulator is converted to binary by calculating H = 0.5[sign(R) + 1], where H =(h 1,1 , ..., h n1,n2 ), h i,j ∈{0, 1}, and sign(.) is the signum function. Otherwise, the demodulator simply passes the analog samples of R to the output unaltered [1]. The performance degradation introduced by quantizing the analog samples of R is negligible if the number of quantization levels is greater than 32 [5], [6]. 0090-6778/09$25.00 c  2009 IEEE Authorized licensed use limited to: ETISALAT COLLEGE OF ENGINEERING. Downloaded on May 19, 2009 at 21:40 from IEEE Xplore. Restrictions apply.