IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 62, NO. 1, JANUARY 2015 19 Distortion Analysis Using Volterra Series and Linearization Technique of Nano-Scale Bulk-Driven CMOS RF Ampliﬁer Haoran Yu, Student Member, IEEE, Kamal El-Sankary, Member, IEEE, and Ezz I. El-Masry, Senior Member, IEEE Abstract—The distortion analysis of nano-scale bulk-driven (BD) CMOS RF ampliﬁer is presented based on Volterra series. The ﬁrst three-order Volterra kernels are computed; and the closed-form expressions of the second-order and third-order harmonic distortion (HD) are derived. These expressions give good accuracy comparing with the simulation results, and can provide insight into the nonlinearity of nano-scale BD ampliﬁer. These expressions unveil and demonstrate that the nano-scale BD MOSFET has distinct nonlinear characteristics. Also, distor- tion-aware design guidelines for nano-meter CMOS BD ampliﬁer are provided. A modiﬁed second-order intermodulation injection technique is presented to suppress the third-order in- termodulation product. This modiﬁed technique which consumes only 64 current employs phase adjustment of the low-frequency ; and up to 20 dB reduction is achieved over 1 MHz–20 MHz two-tone spacing range without gain reduc- tion or noise penalty. Index Terms—Ampliﬁer, bulk-driven, HD, , IM, lineariza- tion, nonlinearity, volterra series. I. INTRODUCTION O WING to the scaling-down channel length of metal-oxide-semiconductor ﬁeld-effect transistor (MOSFET), the performance of CMOS integrated circuits (IC) has been improved greatly. However, the ratio between the power supply voltage and the threshold voltage decreases. While has been reduced continuously to reduce the power consumption of ICs and to avoid breakdown, is not reduced as fast as due to the subthreshold leakage current. Thus analog CMOS IC experiences harsh voltage swing limitation [1], [2]. Bulk-driven (BD) technique has been proposed to tackle this design challenge. BD MOSFET works in a depletion model which allows negative, zero and small positive bias voltage at the bulk terminal. This technique increases the input common mode range as well as the signal swing, which cannot be realized by gate-driven (GD) technique at low [1], [2]. Many BD analog/radio frequency (RF) circuits have been presented, such as BD current source [3], BD operational transconductance ampliﬁer (OTA) [4] and BD mixer [5]. And more RF circuits will be designed with BD technique Manuscript received March 03, 2014; revised June 03, 2014 and July 04, 2014; accepted July 11, 2014. Date of publication October 09, 2014; date of current version January 06, 2015. This work was supported in part by CMC Microsystems and the Canadian Natural Sciences and Engineering Research Council (NSERC). This paper was recommended by Associate Editor N. M. Neihart. The authors are with the Microelectronics & VLSI Research Laboratory, Dal- housie University, Halifax NS B3H 4R2, Canada (e-mail: Haoran.Yu@ dal.ca). Color versions of one or more of the ﬁgures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identiﬁer 10.1109/TCSI.2014.2341116 Fig. 1. (a) Single-ended BD ampliﬁer, (b) Differential BD ampliﬁer. because of the scaling-down feature size of CMOS technology and the quest for high frequency applications. To adapt to RF applications, the nonlinearity of BD circuits needs to be studied carefully. Although the distortion analysis of GD CMOS circuits have been reported in literatures [6]–[11], there is no detailed nonlinearity analysis of BD circuits published according to the best of the authors’ knowledge. In this paper, the nonlinearity of RF single-ended BD ampliﬁer with resistive source degeneration (Fig. 1(a)) and that of differential BD ampliﬁer (Fig. 1(b)) is investigated on transistor-level and system-level, respectively. At ﬁrst, a meticulous distortion analysis is performed on the single-ended ampliﬁer in Fig. 1(a) in order to acquire the insight into the nonlinearity of nanometer BD transistor. Based on an advanced current model suitable for nano-scale MOSFET [12] and Volterra series [13], the ﬁrst three-order Volterra kernels are calculated. Furthermore, the closed-form expressions of the second- and third-order har- monic distortions ( and ) are derived which coincides well with the simulation results using a commercial 65 nm CMOS technology. Speciﬁcally, in this work, the nonlinear output conductance and the cross-terms among , , and are considered. The nonlinear output conductance is excluded in some previous references on GD CMOS circuits [6], [7]. Although it is considered in [8], they focused on the cause of deviation of the third-order intercept point sweet spot from the zero point: where is the third-order coefﬁcient of the nonlinear transconductance. As proven later, the nonlinearity of the output conductance as well as the cross-terms plays an important role in the distortion behavior of nano-scale CMOS transistor. Second-order intermodulation injection was proposed in [14] to improve input third-order intermodulation intercept point . A squaring circuit was used to generate the in- jection [14]–[16]. The phase shift of the arising in the gen- eration was considered as detrimental [14], [15]. Besides, it was 1549-8328 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.