Networked Embedded Systems: a Quantitative Performance Comparison Alessio Botta,Walter de Donato, Antonio Pescap` e, and Giorgio Ventre University of Napoli “Federico II” (Italy) {a.botta,walter.dedonato,pescape,giorgio}@unina.it Abstract— Networked embedded systems are gaining more and more attention and their use in current network scenarios is of indisputable importance. Research community and industry are proposing novel embedded solutions, often based on network processors, for network connectivity, data processing and service delivery. Despite this, quantitative performance comparisons of such systems seem to be very hard to find. In this paper, we describe an experimental analysis of different boards for net- worked embedded systems using both general-purpose and net- work processors, and running both commercial and open source operating systems. The results show that network-processor based boards are able to attain very high performance when compared to boards based on x86 processors, especially when running commercial operating systems. The analysis provides a reference for the design, development, and testing of novel networked embedded systems. I. I NTRODUCTION The growing complexity and heterogeneity of the Internet architecture is triggered by the constant deployment of novel applications and the provisioning of innovative services to the users. This increases the dynamic behavior of such infrastruc- ture in which the embedded systems used for switching, rout- ing, and connecting devices have to possess strong adaptation capabilities. Often high-speed Networked Embedded Systems (NES) are based on the well known Application-Specific In- tegrated Circuits (ASIC). Being tight to a specific application, NES based on such processors attain high performance at the cost of the flexibility. Thanks to their speed, the ASIC are typically used for line-speed packet processing applications such as packet inspection. But, when something changes e.g. packet headers, the systems can not be easily upgraded and sometimes have to be physically changed. In contrast, general purpose processors provide a great flexibility but they are not suitable to implement NES for such applications at current line speed. To bridge the gap between these technologies, few years ago many prominent vendors have started thinking of a new generation of processors for NES able to run at very high speed and to be easily programmed: the network processors. In a short time, several NES using network processors have been developed gaining the interest of both industry and research community. In this paper we are not interested in ASIC-based NES because we believe they are not able to fullfill the requirements 0 This work has been done thanks to Intel Corporation that kindly donated two network processor boards equipped with Intel IXP425. This work has been partially supported by PRIN 2007 RECIPE Project and by CONTENT EU NoE. of current and future network scenarios. Therefore we study the behavior of some architectures for NES based on general- purpose processors and on network processors. In particular, we quantitatively evaluate the performance of two boards based on the Intel network processors that belong to the IXP4XX family [1]. They are cheap processors intended for use in small routers with advanced features (e.g. encryption, etc.), powerful IEEE 802.11 access points, etc.. We study the behavior of these processors with different operating systems both commercial (i.e. Montavista Linux [2]) and open source (i.e. Snapgear [3] and OpenWRT [4]). Moreover, we show their performance when operating on both an experimental board called StarEast [5] and in a real operational access point for IEEE 802.11 networks produced by Netgear. Furthermore, we compare the results with those achieved by a board for NES targeted to the same class of applications but based on a gen- eral purpose processor: the Soekris Net4826 [6] based on the AMD Geode. For the analysis, we use different traffic patterns (obtained by opportunely combining Inter Departure Times and Packet Sizes) generated by using a well known traffic generator called D-ITG [7] which has been purposely ported on the Intel IXP4XX architecture. We describe the problems faced in the porting, underlining the peculiar characteristics of such architecture. Thanks to the use of different boards, operating systems and traffic profiles we provide a complete sketch of what a common application would experiment when running on architectures for networked embedded systems. This paper is organized as follows. Section II describes the motivations at the base of our work, shortly illustrating the framework in which we place our research. Section III provides an overview of the considered Networked Embedded Systems (NES). In Section IV we describe the work we have done for using D-ITG over the IXP4XX-based NES, whereas in Section V results of this preliminary work are presented and discussed. Section VI ends the paper with some concluding remarks. II. MOTIVATION AND RELATED WORK In this paper we consider NES boards based on both the Intel IXP4XX network processors and the AMD Geode general purpose processor. The IXP4XX are widely utilized by several manufacturers for a wide range of commercial NES, such as IEEE 802.11 access points (e.g. Netgear WG302 [8]), access routers (e.g. D-Link DRO-250i [9]), network storage appliances (e.g. Linksys NSLU2 [10]), firewall/VPN devices This full text paper was peer reviewed at the direction of IEEE Communications Society subject matter experts for publication in the IEEE "GLOBECOM" 2008 proceedings. 978-1-4244-2324-8/08/$25.00 © 2008 IEEE.