SDR Compliant Multi-Mode Digital-Front-End Design Concepts for Cellular Terminals GERNOT HUEBER * , LINUS MAURER † GEORG STRASSER ‡ , KARIM CHABRAK § , RAINER STUHLBERGER ¶ , and RICHARD HAGELAUER * * Institute for Integrated Circuits, Johannes Kepler University, Linz, Austria † Danube Integrated Circuits Engineering (DICE), Linz, Austria ‡ Linz Center of Compentence in Mechatronics (LCM), Linz, Austria § Institute for Technical Electronics, University of Erlangen, Germany ¶ Institute for Communications and Information Engineering (ICIE), Linz, Austria Abstract: – The software-defined-radio concept received increasing attention due to necessity of multi-mode/multi-system capable terminals for next generation communication systems. This paper summarizes the requirements of a multi-mode compliant digital-front-end (DFE) and describes concepts for cellular terminal implementations on silicon. A partitioning is proposed wherein functionality, normally located in the analog-front-end, is shifted to the digital-front-end. This work concentrates on the receiver part of the digital-front-end. 1 Introduction Due to the diversity in mobile communications stan- dards, the concept of software-defined-radio (SDR) has grown major importance. Key advantages of SDR in- clude shorter terminal development cycles and greater debugging opportunities. The ability of adopting stan- dards requirements by updating the firmware or recon- figuration of the processing units is a crucial advan- tage, whereas the cost of silicon area and application dimensions is reduced drastically, strengths up the com- petitiveness of network providers and semiconductor manufactors as well. Another major issue are the strong requirements to 3G hardware in terms of the compati- bility to existing 2G networks. This paper discusses trade-offs and design considera- tions of a digital-front-end for for multi-mode commu- nication systems (e.g. EDGE, IS-95, CDMA2000 and UMTS) and presents a concept for an applicable digital- front-end partitioning for cellular terminals. DSP A D LNA Fig. 1. Ideal software-defi ne-radio receiver The architecture of the ideal software-defined-radio ([1], [2]) receiver with a minium of analog components is shown in fig. 1. After the signal is received by the antenna, it is amplified in a low-noise-amplifier (LNA). Before analog-to-digital conversion a lowpass anti-aliasing filter is needed. The analog-to-digital con- verter (ADC) is followed by the digital-front-end, for channelization and decimation. Due to the fact that the channel selection filtering is performed in digital domain (digital-front-end), the analog-front-end and the analog- to-digital converter have to process twice the signal bandwidth of the standard consideration. A special challenge in digital-front-end concept design are the two interfaces. First, the ADC provides the signal to the digital-front-end at a specified bitwidth and data rate. Second, the baseband interface where the data is transfered from the DFE to the baseband integrated circuit (IC). Again, data rate and bitwidth are design criteria which significantly influence system power and noise sensitivity. First of all sec. 2 copes with the pivotal issues of a digital-front-end. The requirements of analog-to-digital converters, their respective of ADC in ideal and non- ideal software-defined-radio systems are presented in sec. 3. Finally a concept for a digital-front-end parti- tioning is presented in sec. 4. 2 Conceptual Design Layout For maximum flexibility the number of analog com- ponents in SDR receivers should be minimized. This implies that channel selection filtering and gain control are performed in the digital domain. The concept of the digital-front-end has to cope with several system realiza- tion related constraints which have to be considered (e.g.