Context adaptive binary arithmetic decoding on transport triggered architecture Joona Rouvinen a ,PekkaJ¨a¨askel¨ainen b , Tero Rintaluoma c , Olli Silv´ en a , Jarmo Takala b a University of Oulu, Oulu, Finland b Tampere University of Technology, Tampere, Finland c On2 Technologies, Oulu, Finland ABSTRACT Video coding standards, such as MPEG-4, H.264, and VC1, define hybrid transform based block motion compen- sated techniques that employ almost the same coding tools. This observation has been a foundation for defining the MPEG Reconfigurable Multimedia Coding framework that targets to facilitate multi-format codec design. The idea is to send a description of the codec with the bit stream, and to reconfigure the coding tools accordingly on-the-fly. This kind of approach favors software solutions, and is a substantial challenge for the implementers of mobile multimedia devices that aim at high energy efficiency. In particularly as high definition formats are about to be required from mobile multimedia devices, variable length decoders are becoming a serious bottleneck. Even at current moderate mobile video bitrates software based variable length decoders swallow a major portion of the resources of a mobile processor. In this paper we present a Transport Triggered Architecture (TTA) based programmable implementation for Context Adaptive Binary Arithmetic de-Coding (CABAC) that is used e.g in the main profile of H.264 and in JPEG2000. The solution can be used even for other variable length codes. Keywords: CABAC, H.264, MPEG4, multi-format codec design, TTA, variable length codes 1. INTRODUCTION Digital convergence has made the contents of the Internet accessible via handheld wireless mobile communication devices, which means that a large number of the available video coding formats need to be supported. In practice, the users will expect the capability to view a full length movie without connecting to the mains. This makes energy efficiency a prime design challenge of system level. A practical limitation for the usage time of a handheld device comes from the maximum tolerated power dissipation that is approximately 3W. If this is exceeded for a 100cc device, it becomes too hot to handle. However, in order to view a three hour movie, the 3W power consumption would require at least a 2500mAh 3.6V LiON battery that will be unrealistic in a small device at least for the next few years. We may expect the small devices to employ batteries at most half that capacity, pushing the power dissipation limit to approximately 1-1.5W of which at most 100mW can be used for application processing such as video decoding. Table 1 depicts the characteristics of expected handheld devices together with the power breakdowns of an early 3G cellular phone and a Personal Digital Assistant (PDA) device. 1 We observe that the power needs of the RF and baseband are expected to remain at a constant level. This is explained by the increasing data rates and complexity of the baseband signal processing. The biggest expected power efficiency changes are in the display solutions due to the emerging organic technologies and in application processing. However, application processing can not rely on the improving energy efficiency of conventional programmable processors, although these would be the most convenient means to support multiple video standards in the same device. Table 2 shows the power needs of two ARM processors and an Intel processor in decoding 30 fps VGA (640 x 480 pixels) H.264 bitstreams. 1 Clearly, software solutions are power hungry. While hardware acceleration can be more efficient, it is inflexible, when support for multiple standards is needed. Further author information: (Send correspondence to Joona Rouvinen.) Joona Rouvinen.: E-mail: joona.rouvinen@ee.oulu.fi