Low-Power Twiddle Factor Unit for FFT Computation Teemu Pitk¨ anen, Tero Partanen, and Jarmo Takala Tampere University of Technology, P.O.Box 553, FIN-33101 Tampere, Finland {teemu.pitkanen, tero.partanen, jarmo.takala}@tut.fi Abstract. An integral part of FFT computation are the twiddle factors, which, in software implementations, are typically stored into RAM memory implying large memory footprint and power consumption. In this paper, we propose a novel twiddle factor generator based on reduced ROM tables. The unit supports both radix-4 and mixed-radix-4/2 FFT algorithms and several transform lengths. The unit operates at a rate of one factor per clock cycle. 1 Introduction Fast Fourier transform (FFT) has gained popularity lately due to the fact that OFDM has been used in several wireless and wireline communication systems, e.g., IEEE 802.11a/g, 802.16, VDSL, and DVB. An integral part of the FFT computation are the twiddle factors, which, in software implementations, are typically stored into RAM memory implying large memory footprint. The twiddle factors can be generated at run- time. A traditional method is to use CORDIC as described, e.g., in [1]. The sine and co- sine values are needed in direct digital frequency synthesizers and often the generation is based on polynomials, e.g., in [2]. An other approach is to use a function generator based on recursive feedback difference equation [3,4]. Typically these approaches re- sult in smaller area than memory based approaches. However, since the computation is done at run-time, there is a huge amount of transistor switching implying higher power consumption in CMOS implementations. Another approach is to store the twiddle factors into a ROM table. In an N-point FFT, there are N/2 different twiddle factors and an approach exploiting this property has been reported in [5]. Methods requiring only N/4 coefficients to be stored into a table are described in [6,7]. There is, however, even more redundancy since the real and imaginary parts of the factors are sine values and N/8 + 1 complex coefficients are needed to reconstruct all the factors for an N-point FFT [8]. In [9], a coefficient manipulation method is presented where only N/8 + 1 coefficients are needed to gen- erate the twiddle factors. However, the previous methods are designed only for radix-2 algorithms containing more arithmetic operations than radix-4 algorithms. A twiddle factor generator unit could be used as a special function unit in an applica- tion-specific instruction-set processor (ASIP) but it may not increase the performance of the software implementation. Often several instructions are needed to compute the correct index to the unit. Considerable performance increase can be expected, if the unit can also perform the index modifications to avoid additional instructions. However, the indexing of the twiddle factors varies depending on the FFT variant. More detailed discussion on twiddle factor indexing can be found from [10]. S. Vassiliadis et al. (Eds.): SAMOS 2007, LNCS 4599, pp. 65–74, 2007. c  Springer-Verlag Berlin Heidelberg 2007