Fabrication, characterisation and modelling of integrated on-silicon inductors R. Murphy-Arteaga * , J. Huerta-Chua, A. D  ıaz-S anchez, A. Torres-Jacome, W. Calleja-Arriaga, M. Landa-V azquez Department of Electronics, National Institute for Research on Astrophysics, Optics and Electronics (INAOE), Tonantzintla, Puebla 72840, Mexico Received 1 June 2002; received in revised form 12 August 2002 Abstract In this paper we present the design, fabrication and characterisation of passive inductors on a silicon substrate. These inductors were fabricated using a 10 lm minimum-feature CMOS process, with two aluminium layers and SiO 2 as the inter-level dielectric. Polygonal and circular inductors of four-and-a-half and seven-and-a-half turns were de- signed, fabricated and measured using a vector network analyser in the 40 MHz to 5 GHz range. Experimental results were compared to the predicted response of a simple equivalent electrical model. Compared to other reported inductors on silicon, the ones presented here show very good characteristics. Ó 2002 Elsevier Science Ltd. All rights reserved. 1. Introduction Passive elements are fundamental in integrated cir- cuits (ICs), especially in wireless communication appli- cations such as low noise amplifiers, voltage controlled oscillators, mixers and passive filters, among others [1– 4]. Even though the integration of inductors on a con- ductive substrate dates to the sixties, it was in the nineties when Nguyen and Meyer [1] demonstrated the feasibility of fabricating them in ICs. Since then, many authors have proposed design and fabrication process modifications [5–7], aiming at improved characteristics. Not withstanding all these efforts, a simple inductor model to be used in commercial IC simulators has not been reported, and thus it is of great importance to carry out a detailed analysis of integrated inductors to deter- mine parasitic components, quantify their influence in the high frequency regime, and model them precisely [2,8]. Nowadays, passive integrated inductors are fabri- cated in silicon and GaAs technologies using metal spirals (Al, Au, Cu) of different geometries (square, hexagonal, decagonal, etc.). One of the most important characteristics of an inductor is its quality factor (Q), which is reduced due to parasitic components such as resistive losses and substrate coupling. In order to attain high values of Q, these components have to be mini- mised. The most commonly reported inductors are square spirals, but some authors have also presented polygonal inductors of six and eight sides [9,10]; others have re- ported spirals of more than eight sides, as well as cir- cular inductors [11,12]. In this paper we present the design, fabrication, characterisation and modelling of polygonal and circu- lar integrated inductors, addressing parasitic compo- nents and the resulting electrical model in Section 2, and the quality factor in Section 3. The design and fabrica- tion process is described in Section 4; experimental re- sults are presented and discussed in Section 5 and general conclusions are drawn in Section 6. Microelectronics Reliability 43 (2003) 195–201 www.elsevier.com/locate/microrel * Corresponding author. Tel./fax: +52-222-247-2742. E-mail addresses: rmurphy@ieee.org (R. Murphy-Arteaga), jhuerta@susu.inaoep.mx (J. Huerta-Chua), adiazsan@ina- oep.mx (A. D  ıaz-S anchez), atorres@inaoep.mx (A. Torres- Jacome), wcalleja@inaoep.mx (W. Calleja-Arriaga). 0026-2714/02/$ - see front matter Ó 2002 Elsevier Science Ltd. All rights reserved. PII:S0026-2714(02)00289-5