An Optimized CLP-based Technique for Generating Propagation Sequences * F. Fummi V. Guarnieri C. Marconcini G. Pravadelli Dipartimento di Informatica - Universit` a di Verona, Strada le Grazie 15, 37134, Verona, Italy {franco.fummi, valerio.guarnieri, cristina.marconcini, graziano.pravadelli}@univr.it Abstract The paper presents a constraint logic programming- based methodology to generate propagation sequences for functional faults by traversing extended finite state ma- chines. Moreover, different strategies are presented to deal with the state explosion problem arising when constraint logic programming is adopted for solving hard problems. Experimental results show the effectiveness of the proposed solutions. 1. Introduction High-level automatic test pattern generators (ATPGs) based on simulation [1, 2] are fast. However, they are un- able to cover corner cases, and they cannot prove untesta- bility. On the contrary, high-level ATPGs exploiting formal methods [3, 4], being exhaustive, cover corner cases. On the other side, they tend to suffer of the state explosion problem when adopted for verifying large designs. In this context, the paper proposes a methodology for addressing hard-to- detect faults when a high-level ATPG is applied to verify functional descriptions of sequential circuits. In particular, the proposed approach is oriented to fault propagation that is, generally, the most critical phase of test generation. The proposed fault propagation procedure relies on: • the extended finite state machine (EFSM) model [5] to represent the design under verification (DVU), since such a model allows a more compact representation of the state space than traditional FSMs; • constraint logic programming (CLP) [6] to determinis- tically propagate functional faults whih are observed, but not detected by traversing the EFSM through the use of different ATPG-based approaches. CLP is a form of constraint programming in which logic programming is extended to include concepts from con- straint satisfaction. In the literature, there are some works which propose techniques based on CLP for generating test sequences for FSMs [7, 8, 9, 10]. However, the existent ap- proaches differ in several aspects from the ones presented in this paper. Mainly, these works do not introduce strategies * This work has been partially supported by the European project VER- TIGO FP6-2005-IST-5-033709. Figure 1. Methodology flow. for avoiding the risk of state explosion when a CLP solver is asked to generate a test sequence to activate the target path. Also, they do not consider any approach, to deal with the problem of managing the complexity, that is the crucial aspect of adopting formal techniques. The paper is organized as follows. Section 2 presents the overview of the proposed methodology. Section 3 intro- duces the EFSM model and it shows how CLP can be used to model an EFSM. Section 4 describes the techniques de- fined to deal with the CLP complexity. Finally, Section 5 reports experimental results, and Section 6 summarizes the concluding remarks. 2. Methodology Overview Figure 1 presents the methodology flow. A high-level ATPG engine, like for example the one presented in [11], is first used to generate test sequences for functional faults injected into the DUV description. Faults that are activated, i.e., observed on internal registers, but not propagated to pri- mary outputs (in the following, we will call them FTBP, i.e., “faults to be propagated”) are collected to be investigated by using the CLP-based approach. In particular, a fault is said to be activated, if it brings the faulty and fault free EFSMs to different configurations [12]. Then, for every FTBP, a CLP model, describing the faulty and fault-free EFSM configu- rations, is automatically generated and passed to the CLP- based fault-oriented ATPG engine, whose goal consists of generating propagation sequences for FTBPs. In particu- lar, the CLP model describes a set of constraints which rep-