Control Loop Timing Analysis Using TrueTime and Jitterbug A. Cervin, K.-E. ˚ Arz´ en, D. Henriksson Department of Automatic Control, LTH Lund University, Sweden M. Lluesma, P. Balbastre, I. Ripoll, A. Crespo Department of Computer Engineering Technical University of Valencia, Spain Abstract— A modern control system is typically implemented as a multitasking software application executing in a real-time operating system. If the computer load is high, the controller will experience delays and jitter, which in turn degrade the con- trol performance. Arguing for an integrated design approach, the paper describes two computer tools for implementation- aware control analysis: TrueTime and Jitterbug. An example is given where the tools are used together to evaluate the performance of various control task implementations. I. I NTRODUCTION The design of computer-based control systems is tradi- tionally based on the principle of separation of concerns. By providing a suitable implementation framework, the concerns of interest to the control engineers can be separated from the concerns related to the computing and communication platform on which the controller is implemented. The as- sumptions underlying the separation are that the implementa- tion platform is able to provide deterministic (often periodic) sampling, negligible or constant input-output latencies, and floating point arithmetics. Separation of concerns has several advantages. It allows the control engineers to focus on the pure control design without having to worry about how the control system eventually is implemented. At the same time, it has allowed the real-time computing community to focus on development of scheduling theory and computational models that makes it possible to fulfil the assumptions, without any need to understand what impact the scheduling has on the stability and performance of the plant under control. However, in practice it is not always so easy to obtain this separation of concerns. In embedded applications, computing and communication resources are often severely limited, and it is therefore desirable to maximize their utilization. The priority-based scheduling used by most real-time operating systems introduces temporal nondeterminism. The schedula- bility theory that is available is mostly concerned with worst- case scenarios. Providing worst-case guarantees often implies over-provisioning of resources and low average-case utiliza- tion. Time-driven static scheduling is more deterministic but less efficient from an utilization perspective. A consequence of these problems is that the separation is often incomplete and therefore the control issues and the computing issues interact, causing temporal nondeterminism in the form of jitter in sampling and latencies. More specifically, scheduling can cause jitter in both the sampling operation and in the actuation operation, as illustrated in Fig. 1. The main drawback with separations of concerns is that y(t ) u(t ) (k - 1)h kh (k + 1)h L s k-1 L io k-1 L s k L io k L s k+1 L io k+1 τ t t Fig. 1. Controller timing with scheduling-induced sampling latency L s and input-output latency L io . Since the latencies vary from sample to sample, there will be jitter in the input and output operations. it often gives rise to worse control performance than what can be achieved if the design of the control and real- time computing and communication parts are integrated. Better performance can be achieved if a co-design approach is adopted, where the control system is designed taking the resource constraints into account, and where the real- time computing and scheduling is designed with the control performance in mind. The resulting implementation-aware control systems are better suited to meet the requirements of embedded and networked applications. A drawback with integration-based design is the increased complexity. Therefore tool support is particularly important. This paper describes two such tools: Jitterbug and TrueTime. TrueTime (Section II) can be used to simulate how the temporal aspects of real-time kernels and network commu- nication influence the timing of a control loop. Given the timing information of a control loop expressed in terms of latency distributions, Jitterbug (Section III) can be used to calculate the control performance, expressed in terms of a quadratic cost function. The paper also presents an example (Section IV) where the two tools have been used together to evaluate various controller task models (including a new task model) with respect to the obtained control performance. The combined usage of the tools is illustrated in Fig. 2. The input Cost TrueTime Jitterbug Task set p L s , p L io J Fig. 2. Possible combined usage of the tools. Proceedings of the 2006 IEEE Conference on Computer Aided Control Systems Design Munich, Germany, October 4-6, 2006 ThA02.4 0-7803-9797-5/06/$20.00 '2006 IEEE 1194