EVALUATION OF ON-CHIP MULTIPROCESSOR ARCHITECTURES FOR AN EMBEDDED CARTOGRAPHIC SYSTEM ALESSIO BECHINI and COSIMO ANTONIO PRETE Dipartimento di Ingegneria dell’Informazione Facoltà di Ingegneria - Università di Pisa via Diotisalvi, 2 56100 Pisa, Italy {a.bechini,prete}@iet.unipi.it ABSTRACT Embedded systems with complex graphical interfaces require significant computational power. Moreover, low power consumption and low cost are usually strict specification constraints. A possible solution for addressing these conflicting needs is the adoption of a simple multiprocessor on a single chip, using low-cost CPU cores. In this paper, we consider a cartographic system to be deployed on hand-held devices, and we present the methodology used for designing the multiprocessor architecture for its hardware platform. Whenever large chip productions are involved, the multiprocessor can be specialized to meet the software requirements of embedded applications. The proposed design process is based on the following steps: Workload definition; Definition of a pool of eligible architectures; Simulation of the software workload; Comparison and analysis of simulation results. In this scenario, trace- driven simulations are aimed at evaluating performance of time-critical paths of typical user activities. The results are used for a proper architecture tuning, determining several architecture parameters (such as the number of CPU cores, the number and width of internal buses, the cache parameters, etc.). The outcome of the design process for the specific system considered in this paper is an architecture with ARM cores, able to support cartographic applications at low cost and low power consumption. Keywords: Performance Evaluation; Trace-driven Simulation; Multiprocessor Architectures; Embedded Systems; On-Chip Multiprocessors. 1 INTRODUCTION Embedded systems require an increasing computational power and, at the same time, have to keep low the cost. Moreover, low power consumption may be required on hand-held devices [1]. A possible solution for obtaining these features relies in the adoption of multiprocessors on a single chip [2] [3], reusing low-cost and low-power processor cells already present on the market. Whenever large productions of the chip are involved, the multiprocessor can be specialized to meet the dedicated software application requirements. Goal of this paper is the presentation of the methodology we have used for selecting and tuning the multiprocessor architecture for a cartographic system, in the framework of the Esprit Project “SPP”. We consider cartographic systems to be deployed on hand-held devices with a LCD display, supporting GPS as well. The design process takes into account the specific behavior of cartographic software, in terms of use of system resources (CPU, memory, LCD, other peripheral devices). In this context, we selected an architecture with two ARM 710 cores. ARM is a 32-bit microprocessor that uses RISC technology and a fully static design approach to obtain both high performance and very low power consumption. Figure 1 – Graphical description of the design methodology. The first problem to be addressed is the workload definition, i.e. the characterization of the software activity and the selection of the input data responsible for the heaviest and an average computational load. The steps must be repeated until the simulation results comply with the specifications on the system performance. The feedback paths (coming from hints for subsequent improvements) are shown with thin black arrows. Simulator Upgrading Selected Architecture Trace-Driven Simulation Result Evaluation Architecture Definition Workload Definition