A Modified Push-Pull Pre-Regulator Based on Three-State Switching Cell Ronny G. A. Cacau (1) , René P. T. Bascopé (1) (1) Federal University of Ceará Electrical Engineering Department Energy Processing and Control Group Fortaleza – CE – Brazil rgacacau@alu.ufc.br, rene@dee.ufc.br José A. L. B. Júnior (1) , Grover V. T. Bascopé (2) (2) GTB Power Electronics R&T AB Dept. of Research and Development Sibeliusgangen 44, 4TR, 164 72 Kista, Sweden eng.ailton.jr@gmail.com, grover.torrico@gmail.com Abstract—This paper presents a single-stage high power factor AC-DC converter based on modified Push-Pull employing three-state switching cell. The topology of the three-state switching cell provides lower current stresses in the switches, since only half the input power is processed by the active switches. Thus, only half the input peak current flows through the switches, reducing conduction and switching losses, hence making the use of this converter very attractive for applications in larger power levels. The volume and weight of magnetic elements is reduced, since they operate at a twice the switching frequency of switches. A theoretical analysis and design example of the proposed converter as well as experimental results for a 1.5kW prototype are presented in this work. I. INTRODUCTION Currently, the quality in the energy supply for low power single-phase systems has been widely explored in the world of power electronics, with many papers developing new topologies and different control strategies being published. In a world ever more technologically advanced, the number of critical loads such as banks, hospitals, telephone, aviation and security systems, among others, requires power supplies without interruption and disturbance for a perfect functioning of the equipments. The Uninterruptible Power Supply (UPS) provides electric power quality, protecting the loads connected to UPS systems of various types of disturbances that occur in the power grid, including overvoltage and under voltage, frequency oscillations and interruptions in the power supply. The UPS can be classified into: on-line, line-interactive and standby passive [1]. Conventionally, on-line UPS systems have an input stage (AC-DC conversion) and an output stage (DC-AC conversion). With international standards IEC 61000-3-2 [2] and IEC 61000-3-4 [3] in force, which is related to the current harmonics limitation injected into public electrical grid for individual equipments, manufacturers of UPS systems need to employ high quality rectifiers in input stage, with Power Factor Correction (PFC) and meet the limitations imposed by the standards. Several topologies of pre-regulators with PFC for UPS application are reviewed in the literature [4]. Thus, in order to seek new topologies for power factor correction with galvanic insulation and power decoupling, this work presents a Modified Push-Pull converter [5] applied to input stage of the UPS systems. This topology is based on Three-State Switching Cell (3SSC) proposed by [6], as shown in Fig. 1. In [7-9] are shown 3SSC applications for non-isolated pre- regulators with PFC. Therefore, this paper focuses in presenting the input stage of a UPS system with PFC proposing an isolated topology based on three-state switching cell that provides reduced conduction losses and reduced volume and weight of magnetic components. A theoretical analysis and experimental results for a 1.5kW prototype are presented in this work. II. DESCRIPTION OF THE PROPOSED TOPOLOGY The proposed converter topology is shown in Fig. 1 and is composed by the following components: a low frequency bridge rectifier given by diodes D1–D4, a storage inductor L b , an autotransformer with windings T1 and T2 (unitary transformer turns ratio), a DC current blocking capacitor C b , an isolated transformer T r , two controlled switches S1 and S2, a high frequency bridge rectifier given by diodes D5-D8, a output filter capacitor C 0 , a protection diode D9, and load resistor R 0 . Vin D1 D3 D4 D2 Co Ro D5 D7 D8 D6 D9 Cb Lb T Tr S2 S1 N2 vLb N1 vT2 vT1 vTrp vTrs vS2 vS1 ILb IT1 IS1 IS2 I0 IT2 ITrp ITrs Figure 1. Proposed converter topology.