So/k/-Skm zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQ E/e&snic.s Vol. 38, No. 7, pp. 1395--1400. 1995 Copyright 0 1995 Elsevier Science Ltd zyxwvutsrqpo 003%1101(94)002614 Printed in Great Britain. All rights reserved 0038-I 101195 $9.50 + 0.00 A RELATIONSHIP BETWEEN INTERFACE TRAP DENSITY AND TRANSCONDUCTANCE IN DEPLETION-MODE FIELD EFFECT TRANSISTORS MASSOOD TABIB-AZARt Department of Electrical Engineering and Applied Physics, Case Western Reserve University, Cleveland, OH 44106, U.S.A. (Received I I July 1994; in revised form I November 1994) Abstract-A simple relationship between the interface trap densities and transconductance of depletion mode field-effect transistors is derived without any simplifying assumptions regarding the energy distribution of the traps. Using this relationship and the experimental transconductance data, interface trap densities in GaAs and InP were calculated and compared to their values obtained using capacitance versus voltage measurements. Our method provides a simple and efficient technique of estimating interface trap densities based on transconductance data that are readily given in the pertinent literature. 1. INTRODUCl.ION Except in silicon, where interface trap densities of SiO,/Si system are reduced below 10”eV-’ cmm2, field-effect transistors of other semiconductors like GaAs and InP are plagued by the large densities of interface traps, in excess of 10”eV-‘cm-2[1]. This shortcoming, however, is offset by the desirable band structure of these compound semiconductors that enables them to be utilized in light generating and very high speed electronic devices[2]. It is well known that allowed energy states, that usually reside in the forbidden energy gap, are present at the surface of semiconductor crystals[3,4]. The quantum mechanical origins of these states were demonstrated at the early stages of the development of the semiconductor electronics[5,6]. Shockley showed that when finite numbers of atoms are brought together to form a cluster, there exist orbitals with energies residing between the bonding and anti- bonding bands[S]. These orbitals usually are not present when very large numbers of atoms are consti- tuting the crystal. On the other hand, Tamm showed that localized electronic states with energies inside the band-gap exist due to the termination of the periodic structure of the crystals at the surface[6]. Simply stated, the surface states can be viewed as electronic states generated by unsaturated dangling bonds of the surface atoms[3]. In the laboratory environment crystal surfaces are usually covered with layers of native oxides and organic contaminants, and surface tThis study was performed during a Sabbatical leave (1993-1994) at the Department of Chemistry, Harvard University, Cambridge, MA 02138, U.S.A. states in the presence of these layers are modified and referred to as “interface states”. While interface traps are undesirable both in minority and majority carrier devices, they can be fatal in some majority carrier devices by pinning the Fermi-level and disabling the field-effect[‘l-lo]. At the time of writing this article, it was not possible to fabricate enhancement mode GaAs metal-insulator-semiconductor field-effect transis- tors (MISFET) because of the presence of large interface-state densities at the GaAs surface. In the case of depletion mode GaAs MISFETs, as we will show in the next section, interface traps may drastically reduce the transconductance (g,) of the transistor. Recently we reported some interesting results regarding the passivation of GaAs using metal- organic chemical vapor deposited (MOCVD) cubic- GaS[ 111. We performed extensive optical and electri- cal measurements to study the effectiveness of cubic- GaS as a passivation layer and as an insulator[ 11,121. We also fabricated GaS/GaAs MISFETs with relatively large transconductance of 70 mS/mm[l2] (g,s as high as 150 mS/mm have also been observed). In an attempt to compare our results with the ones reported in the literature, we discovered that most researchers report either g,s or Dits, and these are rarely reported simultaneously. There is also a ques- tion regarding what levels of D,,s are acceptable from the device operation point of view? Finally, we wanted to know how the combination of insulator capacitance, and the channel doping level can be altered to offset the effect.of the interface traps on gm and to obtain a simple design rule regarding these 1395