The Effect of Nonideal Polar Monolayers on Molecular Gated Transistors O. Shaya, I. Amit, and Y. Rosenwaks* School of Electrical Engineering, Faculty of Engineering, Tel-Aviv University, Ramat-Aviv, 69978, Israel ABSTRACT Nonideal polar monolayers can induce a field-effect in molecular gated transistors. To quantify the magnitude of this phenomenon, we have calculated the effect of roughness and noncontinuity of such layers on the operation of hybrid silicon-on- insulator field-effect transistors. The results show that under most practical conditions, the nonideality of polar monolayers induces very small electric fields in the underlying transistor channel, and consequently a negligible gating effect. KEYWORDS: nonideal polar monolayers • molecular-gated transistors • semiconductor interfaces • self-assembled monolayers • field-effect transistors INTRODUCTION T he use of hybrid devices, in which molecular proper- ties govern their functionality, allows us to combine the power of organic molecular synthesis (1) with the benefits of today’s microelectronic technology (2, 3). For example, layers of polar organic molecules create a surface dipole with which the energy barriers at the surface or interface between two materials can be modified (4-6). Self- assembled monolayers (SAM) are also widely used as linkers between semiconductor surfaces and biological molecules in biosensors (7-9). Because of the long range of electro- static forces, the polar monolayer electronic functionality is determined, among other factors, by the size of the mol- ecules, layer topology, and adsorption pattern (10). This work deals with field-effect-based chemical sensors, CHEMFETs, operating without a reference electrode; this device is sometimes also termed a molecularly controlled semiconductor resistor, MOCSER (4). Another example of such a device is shown in Figure 1 in which a molecular layer is directly adsorbed on the top dielectric of a back gated silicon-on-insulator (SOI) transistor. This layer changes the potential in the conducting channel, thus controlling the transistor current (11, 12). It should be noted that in the absence of a reference electrode, an ideal polar layer should not induce any field in the channel, because the electric field is confined within the layer, much like in a classic infinite parallel-plate capacitor (4, 10). Nevertheless, Capua et al. have recently shown that under certain conditions polar monolayers can also change the transistor current (13). A correlation between the thresh- old voltage and the polarity of the functional group of molecules grafted directly on the silicon of a FET device was recently reported by He et al. (14-16). Paska et al. have shown that the field effect induced by silane monolayers can be controlled by varying the percentage of cross-linking (17). Also, we have recently shown that amine-terminated self- assembled monolayers on the gate-dielectric of a device similar to the one shown in Figure 1 changes its threshold voltage (18). Considering a possible mechanism for these results, Natan et al. have estimated that fringing fields that originate from nonideal (discontinues) polar monolayers might induce a field effect that will be correlated with the net-dipole (10). The effect of layer quality and coverage was previously studied in devices using a reference electrode in which a voltage drop is expected over the polar layer. It was shown that even partial monolayers can affect the barrier height and conductance of semiconductor surfaces (19-22). Con- trol over the work function of silicon was demonstrated by the careful modulation of the molecular coverage (23, 24), * Corresponding author. E-mail: yossir@eng.tau.ac.il. Received for review April 18, 2010 and accepted June 28, 2010 DOI: 10.1021/am1003415 2010 American Chemical Society FIGURE 1. Schematic cross-section of the simulated bottom-gated SOI field-effect transistor. S and D stand for source and drain, and SOI is the low-doped silicon-on-insulator layer in which the current is conducted. A dipolar layer on top of the outer oxide layer (SAM) is modeled by two surface charge densities of opposite signs as indicated by the dashed arrows. The buried oxide layer used in the simulation was 1 µm thick, the top oxide layer was 4 nm, and the channel length was 10 µm. ARTICLE www.acsami.org VOL. 2 • NO. 8 • 2289–2292 • 2010 2289 Published on Web 07/15/2010