New techniques to characterize properties of advanced dielectric barriers for sub-65 nm technology node J. Vitiello a,c, * , V. Ducote d , A. Farcy b , L.G. Gosset a , Y. Le-Friec b , M. Hopstaken a , S. Jullian a , M. Cordeau d , C. Ailhas d , L.L. Chapelon b , D. Barbier c , M. Veillerot d , A. Danel d , J. Torres b a Philips Semiconductors Crolles R&D, 860 rue Jean Monnet, 38920 Crolles, France b STMicroelectronics, Crolles, France c LPM INSA, Villeurbanne, France d CEA-LETI, Grenoble, France Available online 17 October 2006 Abstract Of great interest for sub-65 nm interconnect technologies, low-k barriers are potentially sensitive to Cu diffusion and oxygen-based contamination, respectively leading to short circuits and to performance degradations of Cu lines. Two characterization methods were developed to evaluate these potential weaknesses, (i) liquid phase decomposition (LPD), coupled to Cu contamination analysis in a sac- rificial silicon oxide layer, and (ii) nondestructive reflectivity. LPD was shown to detect defects on the Cu surface or in the barrier itself that cannot be investigated with local analysis such as SIMS probe. Results evidenced the degradation of barrier efficiency against Cu diffusion with the low-k barrier thickness reduction. On the opposite, reflectivity measurements showed that hermeticity of these barriers to oxygen diffusion is not critical for most of the dielectric barriers with k-value higher than 4. The two techniques developed in this study will be useful to evaluate advanced low-k barriers. Ó 2006 Elsevier B.V. All rights reserved. Keywords: Dielectric barrier; Cu diffusion; Hermeticity; Barrier low-k; CuO formation 1. Introduction For advanced technologies (below 65 nm node), the per- mittivity of interconnect insulators has to be reduced to maintain circuit performances in terms of signal propaga- tion delay and to limit parasitic coupling effects such as cross-talk [1]. A lot of efforts are focused on k-value reduc- tion below 2.5 for inter-metal dielectric (IMD) films by introducing porous SiOC material, while the dielectric bar- rier, typically SiCN, which caps the top of the Cu lines is kept constant around a k-value of 5. Reducing its permit- tivity becomes non-negligible all the more as it is empha- sized by the reduction of Cu line height. Advanced dielectric barriers with low k-value (4 6 k < 5) are now proposed, either on standard SiCN barriers with lower density or on bond configuration changes from SiCN to SiC. But these evolutions can also impact the barrier prop- erties and lead to reliability issues. Regarding integration scheme for next technology nodes, two main barrier prop- erties become critical: (i) the efficiency against Cu diffusion through the top dielectric barrier to the upper metal level, potentially leading to short circuits [2], and (ii) barrier her- meticity to outer contamination sources during integration steps to avoid k-value degradation or oxidation of Cu lines [3]. First, the need of dielectric barrier with low k-value is discussed through electromagnetic simulations. Then two techniques developed to accurately characterize the most advanced dielectric barriers, liquid phase decomposition (LPD) coupled to Cu contamination analysis and non- destructive reflectivity measurement, are detailed. Using 0167-9317/$ - see front matter Ó 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2006.09.019 * Corresponding author. Address: Philips Semiconductors Crolles R&D, 860 rue Jean Monnet, 38920 Crolles, France. Tel.: +33 4 389 22339. E-mail address: julien.vitiello@philips.com (J. Vitiello). www.elsevier.com/locate/mee Microelectronic Engineering 83 (2006) 2130–2135