Finding return current paths via synchronized measurements in a multiphase DCDC buck converters Peng Shao #1 , Frank Chang *2 , Chris Reade *3 , Ponniah Ilavarasan *4 , David Pommerenke #5 Department of Electrical and Computer Engineering, Missouri University of Science & Technology, Rolla, MO, USA 65409 1 psrg8@mst.edu 5 davidjp@mst.edu NVIDIA Corporation, 15520 SW Jay St .Beaverton, OR 97006 2 frchang@nvidia.com 3 creade@nvidia.com 4 pilavarasan@nvidia.com Abstract—Evaluation of a product in terms of radiated emissions involves identifying the current return path. In a complex system multiple sources can contribute to the current at one place and frequency. Identifying the source of the current can be achieved by correlating the current to different sources. A multiphase buck converter uses multiple parallel buck converters having different switching times to source a large mount of current. In a multiphase buck converter currents in the capacitors are caused by all phases of the converter, however, the phases do not switch at the same time. Thus, synchronizing to a specific phase allows evaluating how the current of this specific phase spreads throughout the board. With the objective of localizing current one can evaluate if the capacitor placement is optimal and find improved layout and placement solution for a multi-phase buck converter. I. INTRODUCTION Multi-phase buck DCDC converters (figure 1) are used to provide very large currents at low voltages. Typically, they provide the core voltage of processors, so values of 100A at 1.3V are not uncommon. In a multi-phase configuration typically 4-6 converters step the voltage down from 12V to 1.3V. Each converter may run at e.g., 300 kHz, however their switching is distributed over the 3 us cycle time. This is done to reduce the size of the output capacitors. Some randomization maybe introduced to reduce the spectral density at the 300 kHz and its harmonics. Figure 1. Typical Synchronous Buck Converter[1] [2] Schematic Figure 1 shows the schematic of a typical synchronous buck converter. The three MOSFETs (high-side and two low-sides) switch alternatively. The switching of the MOSFETs is controlled by a controller IC which generates a PWM signal and drives the gates. The node where the three MOSFETs and the output inductor share is called ‘phase node’. The voltage waveform of the phase node is expected to be a rectangular pulse train with a certain duty cycle, D. The duty cycle of the phase voltage (fig. 2) waveform determines the output voltage of the converter: V out = D * V in . The output L-C filter averages the phase voltage waveform to a DC output, V out . [3] 53 978-1-4244-4267-6/09/$25.00 ©2009 IEEE