1 Analytic Constant Correction Truncated Multiplication Theo Drane, George A. Constantinides, Simon Fenney Abstract—Truncated multipliers have dramatically reduced hardware consumption compared to full integer multipliers. However, analytic error properties for such schemes are absent from the open literature, so exact error computation requires large simulation time. This paper provides complete analytic error analysis for the most common scheme, constant correction truncated multiplication. Index Terms—Data-path Design, High-Speed Arithmetic, Worst-case analysis, Automatic Synthesis 1 I NTRODUCTION T HERE are many applications in which the full result of a fixed point multiplication is not required, but an appropriately rounded result can be returned. The challenge is to create the most effective trade off between area and error properties. Even for simple truncation schemes there are a wealth of design options and trade offs that can be made. Gathering error statistics for even modestly sized multipliers is extremely time consuming. In order to facilitate high level datapath synthesis that can search the design space of single or interconnected truncated multipliers in an acceptable time, analytic formulae must be found. Removing the need for time consuming simulation contributes to the goal of reliable computing. The majority of truncated multiplier schemes follow the same structure: truncate the multiplier array by removing the least significant k columns, prior to the addition of the partial products [1]. A value C (possibly a function of the multiplicands) is then introduced into the remaining columns. Once the resultant array is summed, a further n k columns are truncated, the result is then the approximation to the multiplication. The salient features of the truncation scheme are summarized in Fig. 1 in which k denotes the sum of the least significant k columns of the binary multiplier array A × B. The error introduced by using the approximation is: ε = 1 2 n {[( AB + C 2 k −△ k ) mod 2 n ] C 2 k + k } (1) This expression covers all the truncation schemes cited in this paper, as well as trivially incorporating non T. Drane and G. Constantinides are with the Department of Electrical and Electronic Engineering, Imperial College London, Exhibition Road, London, SW7 2BT. E-mails: {t.drane09,g.constantinides}@imperial.ac.uk S. Fenney is Head of Research at Imagination Technologies Ltd, Imagina- tion House, Home Park Estate, Kings Langley, Hertfordshire,WD4 8LZ. E-mail: simon.fenney@imgtec.com n k C k Fig. 1. Structure of multiplier truncation scheme. truncation schemes such as round to nearest, up; k =0 and C =2 n-1 . When the array is constructed in such a way that each partial product bit is the AND of the multiplicand bits, we have the basis for the majority of the truncated schemes found within the literature. Early truncation schemes considered C being constant; [1] and [2] referred to as Constant Correction Truncated schemes (CCT). Following these, the proposal to make C a function of A and B appeared, termed Variable Correction Truncation (VCT). In particular the most significant column that is truncated is used as the compensating value for C , an approach termed column promotion. A hybrid between CCT and column promoting VCT has been proposed [3]. Forming approximations to the carries produced by k , has also been put forward, termed carry prediction [4]. Apart from the AND array a negative two’s complement array has also been considered [5]. The particular case of constant multipliers have also been considered [6]. Finally modified Booth multipliers have been studied while applying CCT and VCT [7]. In terms of applications, DSP has been the main focus area but they also appear in creating floating point multipliers, if the accuracy required is 1 ulp then using a truncated integer multiplier within the design is permit- ted [8]. The evaluation of transcendental functions has also been considered for utilising truncated multipliers as well as truncated squarers [9].