Thin-film silicon-on-sapphire LDMOS structures for RF power amplifier applications J. Roig * , D. Flores, S. Hidalgo, J. Rebollo, J. Millan Centro Nacional de Microelectro ´nica (CNM-CSIC), Campus UAB, Bellaterra, 08193 Barcelona, Spain Abstract This work is addressed to the investigation of the electro-thermal performance of RF-LDMOS transistors integrated in TF-SOI, TF-SOS and thinned TF-SOS substrates by means of numerical simulations. Reported experimental trap density, carrier mobility and capture cross- section values have been used together with sapphire datasheet thermal properties, in order to provide accurate simulation results. It is found that subthreshold characteristics are the same for all the analysed substrates while blocking-state, on-state and power dissipation process depends on the substrate type. q 2003 Elsevier Ltd. All rights reserved. Keywords: Silicon-on-sapphire; Silicon-on-insulator; LDMOS; RF; Power amplifier 1. Introduction Recent advances and new requirements on wireless communications have favoured the research on RF circuits integrated on Silicon-On-Sapphire (SOS) substrates using CMOS technology [1], and the development of power amplifiers on Silicon-On-Insulator (SOI) substrates includ- ing LDMOS devices to provide voltage capability up to 30 V [2]. These challenges have also been possible due to the improvement of the Thin Film SOI and SOS (TF-SOI and TF-SOS) substrates manufacturing technologies, lead- ing to high quality active silicon layers. Up to now, LDMOS devices for RF applications are not integrated on SOS substrates because of the low carrier mobility, the high leakage current levels caused by the large trap density [3] and the manufacturing cost of high quality substrates. Advantages of SOI technology vs. bulk technology in the RF application field have been largely reported [4]. The difficulty to combine high-frequency power transistors with high Q on-chip inductors lead to bulk RF amplifiers implemented on standard CMOS technologies with a relatively low level of integration. RF power amplifiers integrated on SOI technology have been recently developed in order to improve the high-frequency performance and to eliminate the cross-talk and latch-up phenomena. Moreover, on-chip inductors with a relatively high Q factor can be easily achieved on SOI technology with a low P-type substrate doping concentration and a thick buried oxide. Furthermore, the SOI technology provides better immunity to radiation induced ionisation currents, thus reducing the soft errors in CMOS systems and circuits. In order to fit the electrical performances of SOI RF power amplifiers to the requirements of the new tele- communication standards, a significant effort has been recently devoted to the improvement of SOI LDMOS structures [2,5,6]. On the other hand, CMOS ICs integrated on SOS substrates show several advantages with respect to CMOS ICs integrated on SOI technology. † High Q factor inductors, due to the reduction of substrate losses. † Better heat extraction capability from the active silicon layer in dynamic and stationary operation modes since the sapphire thermal conductivity is higher than that of the buried oxide. † Reduction of the parasitic bipolar gain, leading to a smaller current kink magnitude and a higher kink onset voltage. † Reduction of the impact ionisation process, thus increasing the breakdown voltage. The crystallographic quality of the active silicon layer on TF-SOS substrates has been largely improved in the last 0026-2692/$ - see front matter q 2003 Elsevier Ltd. All rights reserved. doi:10.1016/S0026-2692(03)00187-3 Microelectronics Journal 35 (2004) 291–297 www.elsevier.com/locate/mejo * Corresponding author. Tel.: þ34-93-594-77-00; fax: þ 34-93-580- 14-96. E-mail address: jaume.roig@cnm.es (J. Roig).