International Journal of Computers and Applications, Vol. 36, No. 2, 2014 DESIGN AND IMPLEMENTATION OF A REVERSIBLE LOGIC BASED 8-BIT ARITHMETIC AND LOGIC UNIT Kamaraj Arunachalam, * Marichamy Perumalsamy, ** C. Kalyana Sundaram, * and J. Senthil Kumar * Abstract An important requirement of a digital system design is to reduce the power dissipation. Reversible logic is an emerging technique, which has the ability to reduce power dissipation. The reversible circuits do not lose information and can generate unique outputs from specified inputs and vice versa. There is no loss of bits during its computation, which results in reduction in power dissipation. In this paper, an 8-bit arithmetic and logic unit (ALU) using reversible logic circuits is proposed and designed in Verilog HDL. The synthesis and implementation result show that the proposed ALU improves by 39% in terms of power dissipation and 10% in terms of propagation delay over the ALU using conventional circuits. It has application in diverse fields such as low-power complementary metal oxide semiconductor (CMOS) design, optical information processing, cryptography, quantum computation and nanotechnology. Key Words Reversible logic, Feynman gate, Fredkin gate, Peres gate, ALU, control unit 1. Introduction Power dissipation in the electronic system is a very crucial limiting factor that can be reduced or minimized with the help of using reversible logic (RL) circuits. RL is emerging as an important research area in the recent years due to its ability to reduce the power dissipation, which is the main requirement in low-power digital system design. Energy dissipation is proportional to the number of bits lost during computation. The reversible circuits do not lose information bits and can generate unique outputs from specified inputs and vice versa. In modern very large scale integration (VLSI) systems, the power dissipation is high due to rapid switching of internal signals. Also, the * Department of ECE, Mepco Schlenk Engineering Col- lege, Sivakasi, India; e-mail: {kamarajvlsi, gullycks.kalyan, senvimjag}@gmail.com ** P.S.R. Engineering College, Sivakasi, India; e-mail: pmarichamy@psr.edu.in Recommended by Dr. M. Hamza (DOI: 10.2316/Journal.202.2014.2.202-3832) systems designed using conventional circuits dissipate heat due to the loss of information bits during computation. Landauer [1] showed that the loss of every bit of infor- mation results in dissipation of KT*ln2 J of heat energy, where K is Boltzmann constant and T is temperature at which the operation is performed. Bennett [2] showed that the heat dissipation due to loss of information bits can be avoided when the circuit is designed using RL circuits. A gate is considered reversible only if every input has a unique output assignment. Hence, there is a one- to-one mapping between the input and output vectors, i.e., it has same number of inputs and outputs [2]–[4]. The RL structures can be realized in the quantum logic system with minimum number of cells [5]. The complexity analysis of the ancilla bits can also be made with shortest path formulation and integer linear program(ming) (ILP) formulation for the RL [6]. An implementation of adder/subtractor and multiplier circuits using RL gates was done and its performance was analyzed by Viswanath and Ponni [7]. In this paper, we have considered an 8-bit arithmetic and logic unit (ALU) for implementation using RL gates and analyzed its performance for power dissipation and propagation delay. The significant blocks of the ALU are adder/subtractor, multiplier, left and right shifter and logic gates. These blocks are realized with the Feynmann, Fredkin and Peres RL gates. The paper is organized as follows: In Section 2, basic RL gates and their function are discussed. The various elements of ALU using the reversible gates are presented in Section 3. The simulated results of the various com- ponents of ALU are discussed in Section 4. In Section 5, performance of the various blocks is compared with the existing ones. Finally, conclusions are given in Section 6. 2. Basic Reversible Gates Reversible gates are bijective. There exist many reversible gates in the literatures [3], [4], [8], [9]. Among them 2*2 Feynman gate [8], 3*3 Fredkin gate [3], 3*3 Toffoli gate (TG) [4], 3*3 Peres gate (PG) [9], new gate (NG) [10] and 4*4 HNG gate [11] are the gates utilized to construct the reversible applications. The detailed cost of a reversible 49