Synthesis of Si Nanostrutures via Self-organized Pillar Mask Soo-Hwan Jeong,* ,† Young Kwan Cha, † In K. Yoo, † Young Soo Song, ‡ and Chee Won Chung ‡ U-team, Samsung Advanced Institute of Technology (SAIT), P.O. Box 111, Suwon 440-600, Korea, and Department of Chemical Engineering, Inha University, Incheon 402-751, Korea Received February 14, 2004 Revised Manuscript Received March 11, 2004 Recently, nanodot arrays have attracted a great deal of attention because of their realization in functional structures and in the field of nanodevices such as optoelectronics, information storage, and sensing. 1-5 Although lithographic techniques offer good control over nanodot size, shape, and spacing, these techniques include expensive and time-consuming processes. There- fore, a variety of alternative methods have been pro- posed for the formation of nanodot arrays on substrates, including self-assembly of nanodots from solution onto a substrate, 6 strain-induced growth, 7 and template- based methods. 8 However, most of these works can be applied to only limited material systems. In this report, we demonstrate an efficient method for fabricating nanodot arrays by using self-organized etching masks based on oxide pillar formation at the bottom of anodic alumina templates (AAT). Our method can be applied to a wide range of materials and over a large area. By forming self-organized oxide pillar arrays and direct patterning to the underlying films using oxide pillar arrays, we can prepare the desired nanodot arrays on the substrate. Figure 1 depicts the schematic of the overall process for the fabrication of Si nanodot arrays onto a wafer. Our approach is based on a well-known aluminum anodization technique, which results in densely packed pore formation. 9 Our strategy begins with the prepara- tion of a layered structure of Al/Ta/Si on a thermally oxidized Si wafer. A sputtered Si film was first prepared on the thermally oxidized wafer, followed by successive deposition of Ta and Al films also by dc sputtering as shown in Figure 1a. Two anodization conditions were chosen to prepare the different sizes of self-organized tantalum oxide hard masks. One was for a relatively large hard mask. The other was for the smaller etching mask. After full anodization of the Al layer, the under- lying Ta layer was anodized, resulting in the formation of tantalum oxide pillar arrays at the bottom of AAT. Selective removal of the porous alumina layer by chemi- cal etching is performed to reveal tantalum oxide pillar arrays. Finally, direct pattern transfer to the underlying Si films results in the formation of Si nanodot arrays on the wafer as shown in Figure 1c,d. Initially, anodizing was performed to form a self- organized tantalum oxide pillar mask at the bottom of AAT pores. As the anodization proceeds, an array of pores develops on the thin, nonporous film of Al 2 O 3 , whose diameter grows until reaching steady-state con- ditions. At steady state, the Al 2 O 3 dissolution at the Al 2 O 3 /electrolyte interface, which is located at the bottom of the pores, is in equilibrium with the Al 2 O 3 oxide growth at the Al 2 O 3 /Al interface with forming straight pores. As the growing pores approach the Ta layer, electrochemical anodization of the Ta layer be- gins. The anodic reaction of Ta results in the formation of tantalum oxide accompanied by formation of hemi- spherical structures due to volume expansion (Figure 1b). Experimental details and the mechanism of the tantalum oxide formation at the bottom of AAT during the anodization process of the Al/Ta layer were previ- ously reported by Vorobyova and co-workers. 10a Figure 2a show a cross-sectional transmission electron micros- copy (TEM) image of the AAT after full anodization. The TEM image clearly shows that there are grown pillar arrays at the interface between the bottom of the AAT pore and initially deposited Ta layer. The thickness of the anodized metal film depends on applied voltage and is usually quoted in terms of the anodizing ratio * Corresponding author. E-mail: shjeong@sait.samsung.co.kr. † Samsung Advanced Institute of Technology. ‡ Inha University. (1) Reboredo, F. A.; Schwegler, E.; Galli, G. J. Am. Chem. Soc. 2003, 125, 15243. (2) Li, X.; Wu, Y.; Steel, D.; Gammon, D.; Stievater, T. H.; Katzer, D. S.; Park, D.; Piermarocchi, C.; Sham, L. S. Science 2003, 301, 809. (3) Harman, T. C.; Taylor, P. J.; Walsh, M. P.; LaForge, B. E. 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Thin Solid Films 1998, 324, 1. (b) Mozalev, A.; Sakairi, M.; Saeki, I.; Takahashi, H. Electro- chim. Acta 2003, 48, 3155. Figure 1. Process for fabricating Si nanodot arrays by using self-organized tantalum oxide as a hard mask. (a) Preparation of layered structure; (b) formation of tantalum oxide pillar arrays through Al anodization; (c) removal of porous alumina layer; (d) reactive ion etching to form Si nanostructures. 1612 Chem. Mater. 2004, 16, 1612-1614 10.1021/cm0497677 CCC: $27.50 © 2004 American Chemical Society Published on Web 04/02/2004