Comparison of a Single and a Dual-Gate GaN Switching-Ampliﬁer for Future Communication Systems S. Heck # , S. Maroldt * , A. Br¨ ackle # , M. Berroth # , R. Quay * # Institute of Electrical and Optical Communications Engineering (INT), Stuttgart, D-70569, Germany * Fraunhofer Institute for Applied Solid-State Physics (IAF), Freiburg, D-79108, Germany Abstract— A high efﬁciency switch-mode ampliﬁer with a dual- gate conﬁguration in the output stage is designed in a 250 nm GaN HEMT technology. Measurements are performed up to 8 Gbps using periodic square wave signals and bandpass delta sigma (BPDS) signals. The results are compared to a single-gate ampliﬁer which uses the same driver stage and gate width. The dual-gate ampliﬁer achieves a higher output power and shows a better RF-performance at bit rates above 2 Gbps. A broadband output power of 14 W and a PAE of 77.5 % at 0.9 Gbps are demonstrated. Furthermore, a 5.2 Gbps BPDS signal with an eye amplitude of about 50 V is measured. It is the ﬁrst time that such high amplitudes are achieved in combination with bit rates above 5 Gbps. The presented measurement results demonstrate the importance of GaN devices for future switch-mode ampliﬁers. Index Terms— class-D, class-S, dual-gate, GaN, high electron mobility transistor (HEMT), monolithic microwave integrated circuit (MMIC), switch-mode ampliﬁer. I. I NTRODUCTION State-of-the-art modulation techniques for mobile commu- nications systems like Universal Mobile Telecommunications System (UMTS) and Long Term Evolution (LTE) exhibit high peak-to-average-ratios (PAR). A high PAR drastically reduces the efﬁciency of linear power ampliﬁers (PA), which are commonly used in current base stations. Due to the fact that base stations are operated day and night, there is a huge potential for saving energy and expenses for the operation. This motivates the research for new ampliﬁer concepts with high energy efﬁciency. Switching ampliﬁers show a theoretical efﬁciency up to 100 %. Hence, there is a huge interest for the use of switching ampliﬁers in future base station applications. The class-S ampliﬁer presented in [1] is shown in Fig. 1. It is one example of current research which uses an efﬁcient switching ampliﬁer. An analogue input signal is converted into a 1-bit digital pulse train using a bandpass delta-sigma modulator (BPDSM). This pulse train is ampliﬁed by a high efﬁcient switch-mode ampliﬁer. A bandpass ﬁlter is ﬁnally used to reconstruct the analogue signal. Switching ampliﬁers need very fast and broadband power transistors in order to achieve high efﬁciencies and high output power. GaN HEMTs can fulﬁll these criteria. They show high switching speed and high breakdown voltage at the same time. Several designs of GaN switch-mode ampliﬁers have been presented recently [2]-[3]. Fig. 1. Block diagram of the class-S ampliﬁer. In order to increase the RF performance of a switching ampliﬁer, a dual-gate transistor design can be used. This reduces the effective input capacitance due to the suppression of the miller effect. A smaller input capacitance allows faster switching. Furthermore, the output power can be increased due to the higher operation voltage of the transistors connected in series as shown in Fig. 2 (b). The use of such multi- gate transistors is a common practice in CMOS PA design in order to increase the output power as shown in [4]-[5]. If an increase of the total output power is not desired, the dual-gate conﬁguration can be used to reduce the device size. This leads to lower parasitic capacitances, which is expected to improve the RF-performance and therefore the efﬁciency. This paper describes the design of a dual-gate ampliﬁer as shown in Fig. 2 (b) and compares it to the single-gate ampliﬁer shown in Fig. 2 (a). The paper is organized as follows: the circuit design of the dual-gate ampliﬁer is described in section II. Measurement results of the ampliﬁer are given in section III and compared to the single-gate ampliﬁer. Finally, a short conclusion is given. II. CIRCUIT DESIGN A. GaN HEMT electrical properties The design uses the GaN MMIC technology presented in [3]. The process includes GaN HEMTs with a gate length of 250 nm. They show a transit frequency f t = 32 GHz and a maximum oscillation frequency f max = 42 GHz at a drain bias of 28 V. The HEMTs are depletion mode devices with a threshold voltage of -2.7V, a maximum drain current density of 1.05 A/mm and an on-resistance of about 3Ω · mm. The breakdown voltage BV DS , which limits the design of the 978-1-61284-757-3/11/$26.00 C2011 IEEE