International Journal of Reconfigurable and Embedded Systems (IJRES) Vol. 1, No. 3, November 2012, pp. 95~102 ISSN: 2089-4864  95 Journal homepage: http://iaesjournal.com/online/index.php/IJRES VHDL Implementation of H.264 Video Coding Standard Jignesh Patel*, Haresh Suthar**, Jagrut Gadit*** * Departement of Electronics & Commmunications Engineering, Parul institute of Engineering & Technology. ** Departement of Electronics & Commmunications Engineering, Parul institute Technology. *** Departement of Electrical Engineering, M.S.University of Baroda. Article Info ABSTRACT Article history: Received Apr 17, 2012 Revised Aug 19, 2012 Accepted Sep 21, 2012 This Paper contains VHDL implementation of H.264 video coding standard, which is new video coding standard of the ITU-T Video Coding Experts Group and the ISO/IEC Moving Picture Experts Group. The main goal of the H.264/AVC standardization effort is to enhance compression performance and provision of a “network-friendly” video representation addressing “conversational” (video telephony) and “no conversational” (storage, broadcast, or streaming) applications.H.264 video coder standard is having fundamental blocks like transform and quantization, Intra prediction, Inter prediction and Context Adaptive Variable Length Coding (CAVLC). Each block is designed and integrated to one top module in VHDL. Keyword: Intra prediction Transform Quantization CAVLC Copyright © 2012 Institute of Advanced Engineering and Science. All rights reserved. Corresponding Author: Haresh Suthar, Departement of Electronics & Commmunications Engineering, Parul institute Technology, PO - Lomda, Ta-Waghodia, Vadodara, India. Email: hareshsuthar@rediffmail.com 1. INTRODUCTION H.264 video coding standard has the same basic functional elements as previous standards (MPEG-1, MPEG-2, MPEG-4 part 2, H.261, and H.263), like, (1) transform for reduction of spatial, (2) quantization for bit rate control, (3) motion compensated prediction for reduction of temporal correlation and (4) entropy encoding for reduction of statistical correlation. Inordered to improve coding performance, the following important changes in H.264 standard occur by (1) including intra-picture prediction, (2) a new 4x4 integer transform, (3) multiple reference pictures, (4) variable block sizes, (5) a de-blocking filter, and (6) improved entropy coding [2]. Improved coding efficiency comes at the expense of added complexity to the coder/decoder. H.264 utilizes different methods to reduce the implementation complexity like, Multiplier-free integer transform is introduced. Multiplication operation for the exact transform is combined with the multiplication of quantization to reduce the quantization step size to improve PSNR to levels that can be considered visually lossless. The noisy channel conditions like the wireless networks obstruct the perfect reception of coded video bit stream in the decoder. Incorrect decoding by the lost data degrades the subjective picture quality and propagates to the subsequent blocks or pictures. H.264 utilizes different methods to exploit error resilience to network noise. The parameter setting, flexible macroblock ordering, switched slice, redundant slice methods are added to the data partitioning, used in previous standards. Depending upon applications, H.264 defines the Profiles and Levels specifying restrictions on bit streams like some of the previous video standards. Seven Profiles are defined to cover the various applications from the wireless networks to digital cinema.In this paper, presented the VHDL design for the H.264 Standards. Algorithm is designed in Xilinx for H.264 and tested using TEXTIO Package of FPGA.