155 FPGA Implementation of a Channel Noise Canceller for Image Transmission Abstract: An FPGA-based channel noise canceller using a fixed-point standard-LMS algorithm for image transmission is proposed. The proposed core is designed in VHDL93 language as basis of FIR adaptive filter. The proposed model uses 12-bits word-length for digital input data while internal computations are based on 17-bits word-length because of considering guard bits to prevent overflow. The designed core is FPGA-brand-independent, thus can be implemented on any brand to create a system-on-programmable-chip (SoPC). In this paper, XILINX SPARTAN3E and VIRTEX4 FPGA series are used as implementation platform. A discussion is made on DSP, Hardware/Software co-design and pure-hardware implementations. Although using a pure- hardware implementation results in better performance, it is more complex than other structures. Results obtained show improvements in area-resource utilization, convergence speed and performance in the designed pure-hardware channel noise canceller core. Keywords: FPGA, Image, Channel Noise Cancellation, Adaptive Filter, LMS Algorithm I. INTRODUCTION One of the most important branches of signal processing is adaptive image processing. The main goal of adaptive processing is type of systems which are adaptively changed and self-modified. They can improve their performance by adaptively learning the characteristics and adjusting their coefficients. Adaptive systems are widely used in many fields such as communication systems, channel estimation, equalization, sonar, radar, smart antenna, navigation systems, industrial control, prediction, system identification and active noise control (ANC) systems. Adaptive systems play an important role in their fields. In some cases especially where non-stationary and time-varying signals are concerned, the importance of adaptive signal processing is clear [1]. Recently requests for portable and embedded digital signal processing (DSP) systems have been increased dramatically. Applications such as audio devices, hearing aids, cell phones, active noise control systems with constraints such as speed, area and power consumption need an implementation by which these constraints are met with shortest time to market. Some possible solutions are ASIC chips, general purpose processor (GPP) and digital signal processor (DSP). Although the first option can provide a solution to meet hard constraints, it lacks the flexibility that is available in the two others. Using field programmable gate arrays (FPGAs) can reduce the gap between flexibility and high performance. New FPGAs include many primitives that provide DSP applications such as embedded multipliers, multiply and accumulate units (MAC), digital clock management (DCM), DSP- Blocks, and soft/hard processor cores (such as PPC). These facilities are embedded in FPGA fabric and optimized for high performance applications and low power consumption. The availability of soft/hard processor cores in new FPGAs allows implementation of DSP algorithms without difficulty. An alternative choice is to move some parts of the algorithm into hardware (HW) to improve performance. This is called HW/SW co- design. This solution would result in a more efficient implementation as part of the algorithm is accelerated using HW while the flexibility is maintained. Another more efficient and more complex choice is to convert the whole algorithm into hardware as a pure HW implementation. Although this is an attractive option under area, speed, performance and power consumption, the design will be much more complex [2]. Studies on LMS algorithm mainly concentrate on two aspects. One is the convergence time from the theoretical perspective; several modified LMS algorithms were proposed in [9], [10]. The other is hardware implementation, in order to improve data throughput, many modified architectures for LMS algorithm such as pipeline technique were proposed in [11], [12]. This paper can be classified into the latter. In serial image transmitting, digital image data are sent through communication channels and as a rule of thumb they are degraded with noise and interferences. Channel noise cancellation is used to identify the channel characteristics and improve image quality. In this paper we first describe the theory of adaptive signal processing and LMS algorithms. Then in the sections III and IV, data entry problem in LMS algorithm and description of the designed fixed-point Standard-LMS algorithm and its use in channel noise cancellation are Omid Sharifi Tehrani*, Mohsen Ashourian**, Payman Moallem*** *M.Sc. in Communication Engineering, Islamic Azad University-Najafabad Branch, Young Researchers Club-Majlesi Branch, HESA Aviation Industries, omidsht@sel.iaun.ac.ir **Assistant Professor, IAU Majlesi Branch, mohsena@ieee.org ***Assistant Professor, University of Isfahan, p_moallem@eng.ui.ac.ir