TR-FSM: Transition-based Reconfigurable Finite State Machine JOHANN GLASER, MARKUS DAMM, JAN HAASE and CHRISTOPH GRIMM Institute of Computer Technology, Vienna University of Technology, Austria Finite state machines (FSMs) are a key element of integrated circuits. Hard-coded FSMs do not allow changes after the ASIC production. While an embedded FPGA IP core provides flexibility, it is a complex circuit, requires difficult synthesis tools and is expensive. This paper presents and evaluates a novel architecture that is specifically optimized for implementing reconfigurable finite state machines: Transition-based Reconfigurable FSM (TR-FSM). The architecture shows a considerable reduction in area, delay and power consumption compared to FPGA architectures with a (nearly) FPGA-like reconfigurability. Categories and Subject Descriptors: B.5.1 [Register-Transfer-Level Implementation]: De- sign—Control design; B.1.1 [Control Structures and Microprogramming]: Control Design Styles—Writable control store; B.6.1 [Logic Circuits]: Design Styles—Sequential circuits; B.7.1 [Integrated Circuits]: Types and Design Styles—Standard cells General Terms: Design, Performance, Theory Additional Key Words and Phrases: Reconfigurable logic, Finite state machine, FPGA, Imple- mentation, Low power, Wireless sensor network 1. INTRODUCTION Digital designs often require finite state machines (FSMs). The hard-coded design is common practice but does not allow any changes after chip production. The exertion of programmable logic such as an embedded FPGA would permit a trade- off, but unfortunately introduces a large area and power overhead [Hartenstein 2001]. In this paper, a new architecture for implementing re-configurable FSMs is presented. We consider FSMs with n S state bits, n I input signals, and n O output signals, with the respective signals being Boolean. The state transition function and the output function derive the next state and the output signals from the current state and the input signals. The number of possible transitions per state equals 2 n I . Since there are 2 n S possible states, we get an upper bound of n T ≤ 2 n S +n I for the total number of transitions for such an FSM. However, FSMs in concrete applications have a number of transitions which is considerably lower than this bound. This is especially true for FSMs with many input signals, where certain states are only This work is conducted as part of the Sensor Network Optimization through Power Simula- tion (SNOPS) project which is funded by the Austrian government via FIT-IT (grant number 815069/13511) within the European ITEA2 project GEODES (grant number 07013). Permission to make digital/hard copy of all or part of this material without fee for personal or classroom use provided that the copies are not made or distributed for profit or commercial advantage, the ACM copyright/server notice, the title of the publication, and its date appear, and notice is given that copying is by permission of the ACM, Inc. To copy otherwise, to republish, to post on servers, or to redistribute to lists requires prior specific permission and/or a fee. c  20YY ACM 0000-0000/20YY/0000-0001 $5.00 ACM Journal Name, Vol. V, No. N, M 20YY, Pages 1–15.