562 IEEE ELECTRON DEVICE LETTERS, VOL. 30, NO. 5, MAY 2009
On the Temperature and Field Dependence of
Trap-Assisted Tunneling Current
in Ge p
+
n Junctions
Eddy Simoen, Francesca De Stefano, Geert Eneman, Brice De Jaeger, Cor Claeys, and Felice Crupi
Abstract—The temperature dependence of the trap-assisted
tunneling (TAT) current component in Ge p
+
n junctions has
been studied between 25
◦
C and 140
◦
C. It is shown that the
impact of TAT reduces significantly due to the combination of the
negative thermal activation of the TAT-enhancement factor and
the exponential increase of the diffusion current with temperature.
It is shown that the experimental data can be well described in the
frame of the Hurkx analytical model, which allows a fairly easy
assessment of the TAT current contribution to the junction leakage
current at realistic operation temperatures of Ge CMOS circuits.
Index Terms—Germanium, leakage current mechanisms, p
+
n
junctions, trap-assisted tunneling (TAT).
I. I NTRODUCTION
W
HILE the high low-field mobility of germanium is
surely an asset that can be exploited in future sub-
22-nm CMOS, its small band gap has raised serious concerns
about limitations imposed by band-to-band tunneling at high
electric fields [1]. At the same time, this may open up the
door for new opportunities, like impact ionization [2], [3] or
tunneling transistors [4], so that it is worthwhile to investigate
in more detail the leakage current and breakdown mechanisms
in germanium-based devices.
It has recently been shown that the reverse current of Ge
p
+
n highly doped drain (HDD) junctions at room tempera-
ture is dominated by trap-assisted tunneling (TAT) for typical
halo doping conditions, which are suitable for submicrometer
pMOSFETs and for drain voltages up to 1 V [5], [6]. In good
approximation, the area leakage current density J
A
can be de-
scribed by the Hurkx model, which is originally developed for
silicon devices [7], [8]. In this case, the Shockley–Read–Hall
(SRH) generation rate by traps in the depletion region extending
Manuscript received November 26, 2008; revised February 25, 2009. First
published April 7, 2009; current version published April 28, 2009. The review
of this letter was arranged by Editor C. Bulucea.
E. Simoen, F. De Stefano, and B. De Jaeger are with IMEC, 3001 Leuven,
Belgium.
G. Eneman is with IMEC, 3001 Leuven, Belgium. He is also with the Depart-
ment of Electrical Engineering, Katholieke Universiteit Leuven, 3001 Leuven,
Belgium, and with Fonds Wetenschappelijk Onderzoek (FWO) Vlaanderen,
1000 Brussels, Belgium.
C. Claeys is with IMEC, 3001 Leuven, Belgium, and also with the Depart-
ment of Electrical Engineering, Katholieke Universiteit Leuven, 3001 Leuven,
Belgium.
F. Crupi is with the Università degli Studi della Calabria, 87100 Arcavacata
di Rende, Italy and also with IMEC, 3001 Leuven, Belgium.
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2009.2017040
from the junction (x = 0) to x = W is modified by the electric-
field-enhancement factor Γ(x) according to
R
trap
(x)=[1 + Γ(x)] R
SRH
(x) (1)
with
Γ=
ΔE
T
kT
1
0
exp
ΔE
T
kT
u -
4
3
√
2m
∗
(ΔE
T
)
3/2
q|E|
u
3/2
du
(2)
where kT is the thermal energy, q the absolute value of the
electron charge, is the reduced Planck constant, and m
∗
is
the tunneling effective mass of the carriers. ΔE
T
is related to
the trap level and equals E
g
/2 for midgap states. E is the local
electric field, and E
g
is the band-gap energy.
However, when investigating the current–voltage (I –V )
characteristics of a Ge p
+
n junction at higher temperatures, it
appears that the reverse current changes from an approximately
exponential increase with reverse bias at 25
◦
C to a nearly
bias-independent behavior at 140
◦
C (Fig. 1). The latter is
typical for a diffusion-current-dominated leakage current [9]. In
other words, for realistic operation conditions, field-dependent
junction leakage mechanisms in sub-22-nm Ge pMOSFETs
appear to be less cumbersome than expected. In order to
support this idea, the TAT leakage current is studied here in Ge
p
+
n junctions as a function of temperature. It is demonstrated
that the experimental Γ factor reduces exponentially with
temperature, with thermal activation energy E
A
being in
the range of 0.15–0.2 eV for the maximum electric fields
studied (∼2 · 10
5
V/cm). This corresponds with a reduction
by a decade of the field-enhancement factor between 25
◦
C
and 140
◦
C, explaining the weaker bias dependence at high
temperatures in Fig. 1. Fitting (1) and (2) to the experimental Γ
factor yields an acceptable tunneling effective mass of 0.15 m
0
(m
0
is the rest mass of the electron).
II. EXPERIMENTAL DETAILS
Junctions have been processed on 200-mm epitaxial Ge-on-
silicon substrates, using the CMOS processing described in de-
tail in [10]. Active areas have been defined by windows etched
in a deposited SiO
2
isolation layer. A 7.5-keV 4 · 10
15
cm
-2
B ion implantation in Ge preamorphized substrates has been
employed to fabricate the HDD junctions in the n-well. Stan-
dard halo implantation has been performed [10]. Activation
annealing was performed for 5 min at 500
◦
C in a nitrogen
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