IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 6, Issue 2, Ver. I (Mar. -Apr. 2016), PP 42-46 e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197 www.iosrjournals.org DOI: 10.9790/4200-0602014246 www.iosrjournals.org 42 | Page Comparative Analysis of Quaternary SETMOS Multiplexer Ms.Vaishali Raut 1 , Dr.Pravin Dakhole 2 1 (Departmen Electronics & Telecommunicationt, GHRCEM, Pune ,India) 2 (Departmet Of Electronics, YCCE, Pune,India) Abstract: This paper introduces the comparative analysis of binary logic with quaternary logic.As quaternary logic build the circuits which are more compact and simple as compared with binary logic .For This two devices are used the first one is PMOS and other one is N-Type single electron transistor(NSET).For Comparative analysis basic hybrid SETMOS Quaternary logic gates as well binary SETMOS Quaternary logic gates are desined and simulated.Similarly three different multiplxers are designed and simulated .Comparison is done with the help of power dissipation. Keywords: single electron transistor,mosfet,quaternary,binary power dissipation. I. Introduction Many of these devices are capable of dealing with more than two logic states, so their efficiency could be utilized if we use multi-valued logic for digital circuits. Some multi-valued logic systems such as ternary and quaternary logic schemes have been developed and they have been being experimented for a long time .These logic systems are derived as propositional or quantum logic [1], [2]. Quaternary logic has several advantages over binary logic. Since it requires half the number of digits to store any information than its binary equivalent, it is good for storage; given that the quaternary storage mechanism is less than twice as complex as the binary system. For the same reason, quaternary devices require simpler parallel circuits to process same amount of data than that needed in binary logic devices[9]. Binary & Quaternary Logic This paper discussed about binary and quaternary logic for the implementation of multiplexer. Multiplexers are important part in designing of selective circuits as well as for the design of full adders. As the interconnections gets reduced in quaternary logic as compared to binary logic hence can be used where more complicated applications need to design.Three different quaternary multiplexers are designed and discussed in the following sections. II. Quaternary Multiplexer In this section type I quaternary logic is implemented.This multiplexer is designed with use of transmission gates and inverters.Then type II inverter is implemented with use of threshold logic.And finally type III quaternary multiplexer is imented with use of MIN & MAX gate. 2.1 Quaternary Multiplexer Type I Fig.1 shows the circuit diagram of 4:1 multiplexer in which only one select line is required as compare to binary logic where four select line are required. In this design two different devices are used one is single electron transistor and other is mosfet.One PMOS and one N-type single electron transistor (NSET) is to create one transmission gate.This type transmission gates are used for the the design of selective circuit.Hence total six transmission gates are used in this complete design.And remaining inverters are used. Fig.2 shows the input and output waveforms of quaternary multiplexer. In which four inputs ,one select line and one output waveform is shown in fig .2.