IOP PUBLISHING NANOTECHNOLOGY Nanotechnology 20 (2009) 025201 (5pp) doi:10.1088/0957-4484/20/2/025201 Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure Tae-Wook Kim, Hyejung Choi, Seung-Hwan Oh, Minseok Jo, Gunuk Wang, Byungjin Cho, Dong-Yu Kim, Hyunsang Hwang and Takhee Lee 1 Heeger Center for Advanced Materials, Department of Materials Science and Engineering, Gwangju Institute of Science and Technology, Gwangju 500-712, Korea E-mail: tlee@gist.ac.kr Received 5 August 2008, in final form 9 October 2008 Published 9 December 2008 Online at stacks.iop.org/Nano/20/025201 Abstract The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 × 40 μm 2 to 200 × 200 nm 2 . From the scaling of junction size, the memory mechanism can be attributed to the space–charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio ( I ON / I OFF ∼ 10 4 ), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10 000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices. S Supplementary data are available from stacks.iop.org/Nano/20/025201 (Some figures in this article are in colour only in the electronic version) 1. Introduction Polymer materials have been developed as active components in a variety of device applications, such as organic light- emitting diodes, thin-film transistors, memory devices, photovoltaic cells, and sensors [1–5]. Among these applications, polymer non-volatile memory appears highly attractive, owing to its potential usage in data storage media [6–12]. In particular, polymer memory devices have attracted a lot of attention due to their simple structure, three-dimensional stacking capability, good scalability, high mechanical flexibility, and low fabrication cost. Until now, most research on polymer memory devices has focused on the synthesis of conjugated polymer materials as memory elements [13–16] or the identification of appropriate ratios between polymer materials and metallic nanoparticles in a blend of the two [17–19]. Basic device structures for 1 Author to whom any correspondence should be addressed. electrical characterizations were typically in the form of unit devices or cross-bar-type devices in which the active polymer memory elements were vertically sandwiched between two metallic electrodes [6–19]. The junction of the polymer memory devices has mainly been defined by the size of the shadow mask during the top electrode metallization; thus it has been hard to reduce the active cell size below the sub-micron scale. Junctions in sub-micron size have only been characterized by conducting atomic force microscopy (CAFM) [20, 21]. However, it is not trivial to evaluate the detailed memory performance of polymer materials with CAFM because the possible measurements are limited to current–voltage ( I –V ) sweeps or current images which are based on simple contacts or scanning of the conducting tip on the polymer layer. The scaling issue has been one of the important research topics in many emerging memory technologies such as ferroelectric random access memory (FRAM), magneto- 0957-4484/09/025201+05$30.00 © 2009 IOP Publishing Ltd Printed in the UK 1