An Organic/Si Nanowire Hybrid Field Configurable Transistor Qianxi Lai, † Zhiyong Li, ‡ Lei Zhang, † Xuema Li, ‡ William F. Stickle, § Zuhua Zhu, † Zhen Gu, † Theodore I. Kamins, ‡ R. Stanley Williams, ‡ and Yong Chen* ,† Department of Mechanical and Aerospace Engineering and California NanoSystems Institute, UniVersity of California, Los Angeles, California 90095, Quantum Science Research, Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, California 94304, and AdVanced Materials Process Lab and AdVanced Diagnostic Lab, Hewlett-Packard Company, CorVallis, Oregon 97330 Received November 29, 2007; Revised Manuscript Received January 16, 2008 ABSTRACT We report a field configurable transistor (FCT) fabricated on a Si nanowire FET platform by integrating a thin film of conjugated polymer poly[2-methoxy-5-(2′-ethylhexyloxy)-p-phenylene vinylene] (MEH-PPV) and an ionic conductive layer (RbAg 4 I 5 ) into the gate. The FCT can be precisely configured to desired nonvolatile analog state dynamically, repeatedly, and reversibly by controlling the concentration of iodide ions in the MEH-PPV layer with a gate voltage. The flexible configurability and plasticity of the FCT could facilitate field-programmable circuits for defect-tolerance and synapse-like devices for learning. The continued miniaturization of the Si-based field-effect transistor (FET) will reach its fundamental physical limit in a decade or so, 1 which has led to significant efforts in the development of new nanoscale electronic devices based on Si nanowires, 2 carbon nanotubes, 3 molecules, 4 etc. Simple electronic circuits based on these nanodevices 5–7 have also been demonstrated, but it is challenging to integrate these devices into large-scale functional circuits for practical applications due to the inevitable defects introduced during the fabrication of these devices and circuits. Various defect- tolerant circuit architectures have been proposed, 8–11 in which the defects in circuits can be identified by postfabri- cation tests, and then the defects can be corrected and the circuits can be reconfigured toward desired functions. To build up the defect-tolerant circuit, it is highly desirable to develop nanoscale field configurable devices that can not only preserve the merits of the Si FET but also incorporate synapse-like analog configurability and plasticity. Floating gate Si FETs have been used for digital field programmable circuits, but such devices can hardly be integrated with nanowire-based devices and are difficult to configure pre- cisely to a desired analog state. 12 Recently, organic molecules were incorporated into the gate structures of Si FETs 13 and semiconductor nanowire transistors, 14,15 which can then be configured to bistable or multiple discrete electronic states by applying a gate voltage to control the redox state of the molecules. Although these devices have been demonstrated for multiple-state nonvolatile memory and programmable logic applications, it is difficult to integrate a liquid electrolyte into a gate structure or semiconductor nanowires with back gates into more general-purpose circuits. In this letter, we report an organic/Si hybrid field- configurable transistor (FCT) fabricated on a Si nanowire FET platform that can be flexibly configured to precise analog states. The device structure is shown schematically in Figure 1a. A thin film of poly[2-methoxy-5-(2′-ethyl- hexyloxy)-p-phenylene vinylene] (MEH-PPV), a conjugated polymer, and an inorganic layer of RbAg 4 I 5 , an ionic conductor, 16 were sandwiched between the gate SiO 2 layer and an Al/Ti metal gate electrode to incorporate the config- uration function. When a gate voltage exceeding a threshold value is applied, depending on its polarity, the iodide ions from the RbAg 4 I 5 are injected into or extracted from the MEH-PPV layer, resulting in the configuration of the FCT electronic characteristics. The FCT preserves the conventional Si source-channel- drain (n-p-n) structure. The FET Si nanowire channel is p-Si with a nominal boron doping concentration of 3 × 10 17 / cm 3 and has a width of 80 nm, a thickness of 60 nm, and a length of 10 μm, respectively. A scanning electron micro- scope (SEM) image shows its structure in Figure 1b. The n-Si source and drain had a nominal phosphorus doping concentration of 1 × 10 20 /cm 3 . The source and drain patterns were fabricated by photolithography, and the nanoscale Si channel was fabricated by e-beam lithography on a Si layer * Corresponding author. E-mail: yongchen@seas.ucla.edu. † University of California, Los Angeles. ‡ Hewlett-Packard Laboratories. § Hewlett-Packard Company. NANO LETTERS 2008 Vol. 8, No. 3 876-880 10.1021/nl073112y CCC: $40.75  2008 American Chemical Society Published on Web 02/12/2008