IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. zyxwvutsrqp 41. NO. 1, JANUARY 1994 109 Briefs zyxwv Analysis of the Latch and Breakdown Phenomena in N and P Channel Thin Film SO1 MOSFET’s as a Function of Temperature F. Balestra, J. Jomaah, G. Ghibaudo, 0. Faynot, A. J. Auberton-Herve, and B. Giffard zyxwvutsrq Abstract-A study of the latch and breakdown phenomena in thin film N- and P-channel SO1 MOSFET’s is performed as a function of temperature. For P-type MOSFET’s, for which no investigation of the parasitic bipolar transistor has been carried out, we show that latch problems are observed in the subhalf-micrometerrange, while this feature is emphasized in the micrometer range for N-channel transistors. In ad- dition, it is demonstrated by theoretical considerations and experimental results that these parasitic effects are strongly reduced at liquid nitrogen temperature and vanish almost entirely at liquid helium temperature. Similar improvements are obtained at low temperature in both N and P-channel SIMOX MOSFET’s. I. INTRODUCTION Thin film SO1 MOSFET’s are potentially competitive with bulk Si MOSFET’s in submicrometer CMOS applications due to a strong improvement of their electrical properties. However, floating-body effects, triggered by impact-ionization charging of the film body, are particularly annoying in these devices. One of these phenom- ena, namely, the kink effect, which is due to a decrease in the threshold voltage caused by an intemal substrate-source voltage, occurs for thick film devices. For short channel MOSFET’s, this parasitic behavior can be significantly reduced zyxwvutsrqp [ 11. Furthermore, by using thin SO1 films the kink effect can be suppressed because the depletion charge cannot be increased any more [2], [3]. The main drawback of fully depleted thin-film devices is associated with another effect, the parasitic bipolar transistor (PBT), which can induce premature breakdown and latch phenomena [4]-[7]. These behaviors can jeopardize high-speed operation and portend power-consumption problems in SO1 CMOS due to the loss of gate control, especially for short channel lengths. Breakdown and latch phenomena have been reported previously for N-channel enhancement-type thin film SO1 MOS transistors [4]-[6]. Recently, PBT effects have also been shown for n-channel depletion- type thin film SO1 MOSFET’s [7]. Due to the decrease of the impact ionization rate for holes compared with electrons, these effects are lowered in the case of P-channel devices. Typically, PBT problems are important for channel length in the micrometer range for N- channel devices, and, as it will be shown, are important in the subhalf-micrometer range for P-channel devices (with 5 V bias). A preliminary investigation of the behavior of the parasitic bipolar transistor in thin film SO1 devices at low temperatures was recently Manuscript received July 6, 1993. The review of this brief was arranged by Associate Editor D. A. Antoniadis. F. Balestra, zyxwvutsrqpon J. Jomaah, and G. Ghibaudo are with the Laboratoire de Physique des Composants zyxwvutsrqpo B Semiconducteurs (URA-CNRS), ENSERGflNPG, 38016 Grenoble, France. 0. Faynot and B. Giffard are with LETI (CEA-Technologies Avancees), DMEL-CENG, 38041 Grenoble, France. A. J. Auberton-Heme is with SOITEC, Site Technologique ASTEC, 38041 Grenoble, France. IEEE Log Number 92 13698. presented [8], and very encouraging results were obtained. The aim of this paper is to demonstrate, for the first time, the existence of PBT problems for p-channel SO1 MOSFET’s and to present the first studies of PBT effects in N- and P-channel MOS transistors as a function of temperature, emphasizing in particular the interest of liquid nitrogen and liquid helium temperature operation. 11. RESULTS AND DISCUSSION SIMOX substrates were formed at LETI by NV200 100 mA oxygen implantation (1.8 x 10’~ cmP2 in ’ n-type Si wafer). A subsequent annealing at 1320°C (6 h) was performed. Enhancement- and depletion-mode P- and N-channel MOSFET’s were fabricated with conventional bulk Si technology with a LOCOS isolation. Lightly doped regions (LDD-type) near source and drain have been used in the case of P-channel(2 x lOI3 cm-’ implantation dose) and N-channel (4 x 10” cni-’ implantation dose) MOS transistors. N- channel MOSFET’s have also been fabricated without LDD regions. After the processing of the devices, the thicknesses of the Si film, gate oxide, and buried oxide are 80 nm, 17.5 nm and 380 nm, respectively. A. zyxwvutsrqp P-channel Devices We show in Fig. ](a) the typical off-state (1; = 0) breakdown of a LDD-type short-P-channel (0.3 pm effective channel length) thin- film depletion-mode SIMOX MOSFET. At 300 K, the leakage current increases continuously until a drain bias of about 4.5 V for which the breakdown occurs. The drain leakage current is always lower at low temperature compared with room temperature. In particular, at 77K, the leakage current at low is significantly improved, and the breakdown voltage is also slightly higher. At 4.2 K, the leakage current is always negligible for drain voltages up to 6.5 V. In Fig. l(b), the typical off-state breakdown for a LDD-type P- channel enhancement-mode SIMOX device is presented as a function of temperature. A strong enhancement of the device performances is also obtained at very low temperature (77K and 4.2K), with a breakdown voltage higher than 6.5 V. Besides, the leakage current is also notably lowered for low drain voltage. Two main reasons are responsible for these improvements. First, the bipolar transistor current gain zyxwv ,3 decreases, due to the difference in bandgap between emitter (source) and base (thin Si film) which causes the gain to decrease quasi-exponentially with temperature as ~91: with where AE, is the bandgap reduction in the heavily doped emitter, LT the thermal energy, q the electron charge, ES the silicon permittivity, and the emitter (source) doping. It is worthwhile noting that the bandgap reduction AEg increases also by decreasing the temperature, which strengthens the reduction of j. Second, the freeze-out of the lightly doped regions at the source and the drain, due to the use of LDD-type devices, occurs at low temperature. The lightly doped drain is useful in order to lower the 0018-9383/94$04.00 zyxwvuts 0 1994 lEEE