Dr.Yarub A. Estaitia , Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 8, (Part - 3) August 2016, pp.29-32 www.ijera.com 29|Page Enhancing the Design of VRM for Testing Magnetic Components Dr.Yarub A. Estaitia Al-Taif University ABSTRACT The aim of this work is to design, build and test a voltage regulator module circuit (VRM) that can be used to compare the performance of different magnetic component designs. The VRM will be used to convert the input voltage (typically 12V) to a lower level which will supply a microprocessor load e.g. the Intel Pentium. The work will include review of VRM circuit topologies for VRM 10.1 specification. Circuit design will be performed for available controller IC. Simulation and analysis of the circuit in PSPICE and characterization under transient conditions, a circuit will be designed for simulating a transient load change in PSPICE. Finally all required components will be ordered and the circuit will be built and can be used for testing of inductors and transformers. Keywords: PSpice, Voltage regulator, Module, testing, magnetic components I. INTRODUCTION The increases in microprocessor speeds and transistor number have resulted in an increase in current demands and transition speeds. The supply voltages of the microprocessors have been decreased in order to reduce power consumption. As Intel predicted, with the continuous advances being made with semiconductor technology, the microprocessors need to operate at significantly lower operating voltages, higher currents and higher slew rates. These low voltages, high currents and high slew rates are the challenges imposed on power supplies for microprocessors. The industry standard power supply architecture used is a dedicated DC-DC converter, the voltage regulator module (VRM), placed close to the microprocessor to minimize the impedance between the VRM and the microprocessor. Voltage regulator modules are a special class of power converter circuits used to supply microprocessor loads e.g. the Intel Pentium. The VRM converts the system bus voltage (typically 12 V) to a lower level. While current operating voltages are in the range of 1 - 1.5 V, it is expected that the required operating voltages in the next few years will decrease below 1 V while increasing the drawn current (the required current can easily exceed 100A) from the power supply in order to reduce the power consumption while increasing the microprocessor speed. With such low voltage levels, one of the main challenges of VRM design is to maintain the constant output voltage under varying and transient load (current) conditions, when the microprocessor switches from one state to the other, voltage drop spikes occur, these spikes must be limited. The main limit is caused by the large inductance values required to maintain ripple levels for steady-state operation. The standard industry solution is a multi-phase buck converter, in which the inductance is distributed between several phases that are controlled in parallel. A buck derived voltage regulator module (VRM) will be designed to satisfy these requirements. II. DESIGN PROCEDURE This section summarizes a step-by-step procedure for a 12V-to-1.3V @120A power supply for high current and high transient speed applications. Setting clock frequency R T is an external resistor used to set the clock frequency. This clock frequency divided by the number of phases determines the switching frequency per phase. The switching frequency will be used to determine the size of the inductors and input and output capacitors and switching losses. R T = k pF f n SW 27 5 . 4 1 = k pF k 27 5 . 4 485 4 1 = 87.55kΩ Where 4.5 pF and 27 kΩ are internal IC component values. Soft Start & Current Limit Latch off delay times Soft start allows the power converter to gradually reach the initial steady state operating point, this reduces start up stress and surges. The RESEARCH ARTICLE OPEN ACCESS