2618 IEEE TRANSACTIONS ON COMMUNICATIONS, zyxwvu VOL. 42, NO. 8, AUGUST 1994 The Helical Switch: A Multipath ATM Switch Which Preserves Cell Sequence Indra Widjaja and Albert0 Leon-Garcia Abstract-This new paper presents a new cell switching ar- chitecture for ATM-based networks. The proposed helical switch is a multistage interconnection network which implements the self-routing technique with efficient buffer sharing. Although the switch may route cells along multiple paths, the connection- oriented mode required by the ATM-based network is supported. Cell sequence integrity is guaranteed by introducing a virtual helix which forces cells routed along different paths to proceed in order and fill the internal buffers uniformly. The performance of the helical switch is investigated under uniform and nonuniform traffic patterns. Unlike single-path multistage networks such as buffered banyan networks which can degrade significantly under nonuniform traffic, the helical switch is shown to be quite robust with respect to nonuniform traffic conditions. I. INTRODUCTION HE MAIN function of an ATM switch is to route fixed- T length blocks of information (or “cells” in the ATM terminology) from any input port to any output port. Since ATM switches are required to transfer cells at very high rates (about 150 or 600 Mbps), the switching systems are gener- ally based on massively parallel architectures implementing distributed control mechanisms. Early ATM switch designs were mostly based on variations of banyan networks which are multistage interconnection networks with a single path property, i.e., there exists one and only one path between every input and every output port. The advantage of the zyxwvutsrqp N zyxwvutsrq x N banyan networks is that they require only zyxwvutsrqpo O(N log N) switching elements, where the switching element (usually a 2 x2 crossbar switch) represents the basic building block required to construct the switch fabric. The basic unbuffered banyan networks are inherently blocking, meaning that two cells with different destination addresses may be routed through the same internal link at the same time, thereby creating cell conflict. Because of this blocking phenomenon, internal buffers have been adopted so that cells losing a contention for the same intemal link may be placed in a buffer for subsequent attempts. These internal buffers may be placed at the inputs or outputs of the switching element, and may also be shared. While the buffered banyan networks may perform reason- ably well under the so-called uniform trafic pattern, i.e., independent and identically distributed Bernoulli cell arrivals Paper approved by G. P. O’Reilly, the Editor for Communications Switch- ing of the IEEE Communications Society. Manuscript received September 23, 1991; revised April 20, 1992. This paper was presented in part at the IEEE INFOCOM’92, Florence, Italy, May 6-8, 1992. The authors are with the Department of Electrical Engineering, University of Toronto, Toronto, Ont. M5S 1A4, Canada. IEEE Log Number 9401946. Fig. zyxwvuts 1. Communities of interest lead to congestion in banyan network. at the switch input ports with random output port selection of equal probability, their performance deteriorates significantly under other types of traffic pattems [l], [21, [31, [SI. Other traffic pattems result in intemal link flows that exceed the link transmission capacity producing severe congestion, for example, Fig. 1 shows the “maximum conflict” traffic pattern. The single-path property of the banyan switch makes the congestion unavoidable regardless of the types of buffering in the switching elements. Multipath switch fabrics were proposed to alleviate the internal congestion problem in multistage switches [ 11, [4]. These switches generally perform extremely well under var- ious nonuniform traffic pattems. However, they can only perform in a connectionless mode since cells are routed in multiple paths inside the switch fabric and hence there is a possibility for cells to be out of sequence. According to the zy CCITT recommendation I. 12 1, ATM is a connection-oriented mode which guarantees cell sequence integrity. Thus, ATM switches have to operate in a connection-oriented mode from the extemal point of view, or else resequencing facilities have to be provided at the output of the connectionless switch fabric. In this paper, we present a new cell-switching architecture, called the helical switch, which takes a rather unconventional approach to solving the cell sequencing problem in a multipath switch. The helical switch allows cells for the same input- output pair to choose different paths as they hop from one stage to the next stage in such a way that the cell sequence integrity can still be preserved. To prevent cell build-up in a particular buffer, the helical switch distributes the loads as uniformly as possible at every stage. As a result, the switch is very robust under diverse traffic pattems. .OO zyxwvutsrqp 0 1994 IEEE 0090-6778/94$04