142 IEEE ELECTRON DEVICE LETTERS, VOL. 30, NO. 2, FEBRUARY 2009 A 10-kV Monolithic Darlington Transistor With β forced of 336 in 4H-SiC Qingchun Zhang, Charlotte Jonas, Michael O’Loughlin, Robert Callanan, Anant Agarwal, and Charles Scozzie Abstract—4H-SiC bipolar Darlington transistors with a record-high current gain have been demonstrated. The dc forced current gain was measured up to 336 at 200 W/cm 2 (J C = 35 A/cm 2 at V CE = 5.7 V) at room temperature. The current gain exhibits a negative temperature coefficient and remains as high as 135 at 200 ◦ C. The specific on-resistance is 140 mΩ · cm 2 at room temperature and increases at elevated temperatures. An open-emitter breakdown voltage (BV CBO ) of 10 kV was achieved at a leakage current density of < 1 mA/cm 2 . The device exhibits an open-base breakdown voltage (BV CEO ) of 9.5 kV. The high current gain of SiC Darlington transistors can significantly reduce the gate-drive power consumption with the same forward-voltage drop as that of 10-kV SiC bipolar junction transistors, thus making the device attractive for high-power high-temperature applications. Index Terms—Bipolar junction transistors (BJTs), BV CBO , BV CEO , current gain, Darlington transistor, silicon carbide. I. I NTRODUCTION D UE TO their unique device properties such as low on- resistance at high current density, normally off, positive temperature coefficient (PTC) of the resistance, and fast switch- ing speed, SiC power bipolar junction transistors (BJTs) offer numerous benefits in high-power systems [1]–[4]. SiC BJTs have the potential to operate at high temperatures and harsh environments due to the absence of the gate oxide. The main disadvantage of the BJT device, however, is that it requires a continuous base drive current. Therefore, improving the current gain of SiC BJT devices remains an important goal. A current gain as high as 110 has been demonstrated, but the device suffers from a much-reduced BV CEO due to the transistor action [5]. A bipolar Darlington transistor allows operation of BJTs with a high current gain, but an offset of forward-voltage drop (> 2.7 V for SiC) makes it less attractive for low-voltage device [6], [7]. For very high voltage (> 10 kV) applications, the device is normally operated at a high forward voltage, thus Manuscript received August 15, 2008. First published December 22, 2008; current version published January 28, 2009. This work was supported by the Cooperative Agreement W911NF-04-2-0022 Program funded by the Army Research Laboratory, Adelphi, MD. The review of this letter was arranged by Editor J. K. O. Sin. Q. Zhang, C. Jonas, M. O’Loughlin, R. Callanan, and A. Agarwal are with Cree, Inc., Research Triangle Park, NC 27709 USA (e-mail: Jon_Zhang@cree.com; Charlotte_Jonas@cree.com; michael_oloughlin@cree. com; Robert_Callanan@cree.com; anant_agarwal@cree.com). C. Scozzie is with the U.S. Army Research Laboratory, Adelphi, MD 20783 USA (e-mail: sscozzie@arl.army.mil). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2008.2009953 Fig. 1. (a) Simplified structure and (b) photographic image of a 4H-SiC bipolar Darlington transistor. the offset in Darlington transistor can be compensated. SiC Darlington transistors up to 14 kV have been simulated in [8] which shows that SiC Darlington transistors could have high current-handling capability and reasonable switching speed. In this letter, a 10-kV 4H-SiC bipolar Darlington transistor is reported. The device has a forward-voltage drop similar to that of a 10-kV SiC BJT, but the Darlington transistor has achieved a record-high forced current gain of 336 at room temperature, which is more than ten times higher than that in the 10-kV SiC BJT. Temperature dependence of the on-resistance and the current gain for the Darlington transistor are highlighted. II. EXPERIMENT Fig. 1 shows a simplified cross section and a photograph of the Darlington transistor with two BJTs as the drive and the output devices, respectively. The area ratio between the output transistor and the driver transistor is approximately five. Both BJTs have a cell pitch of 25 μm. The epitaxial layers are grown on a silicon face, 3-in n-type 4H-SiC substrate which was cut 8 degree off-axis. All epilayers are continuously grown in one epitaxial run. The n-type drift layer is 128 μm thick and doped at 5.3 × 10 14 cm −3 . Following the growth of the drift layer, a 0.5-μm-thick p-type layer doped at 6 × 10 17 cm −3 is grown as the base layer. The n + emitter layer was 2 μm thick, heavily doped with nitrogen. The top n + layer was isolated with an RIE etch to form the emitter fingers. This was then followed by the base etch to completely isolate the devices. The driver BJT and the output BJT were electrically isolated by mesa formation with spacing of 4 μm such that both BJTs were shielded from 0741-3106/$25.00 © 2009 IEEE