Microstructural Origin of High Mobility in High-Performance Poly(thieno-thiophene) Thin-Film Transistors By Chenchen Wang, Leslie H. Jimison, Ludwig Goris, Iain McCulloch, Martin Heeney, Alexander Ziegler, and Alberto Salleo* In recent years, semiconducting polymers have been widely studied for their potential applications in low-cost, printed, and flexible electronic devices. [1] Carrier mobility in these materials has been steadily increasing, approaching that of hydrogenated amorphous silicon. [2] The best-performing polymeric semicon- ductors exhibit a high degree of order and are typically semicrystalline. [3,4] Charge transport in semicrystalline polymers is controlled at several length scales. In the ordered regions of the material, conjugated polymer chains stack in lamellar sheets with p–p interactions between neighboring chains. [5] In addition to ordered crystallites, the microstructure of semicrystalline poly- mers comprises disordered regions. The spatial arrangement of the crystallites and the disordered regions affect transport via trapping at defects and the percolation properties of the crystalline and disordered networks. Therefore, in order to develop accurate models of charge transport, it is important to understand the relationship between the morphology of the film, its microstructure and its electronic properties. [3–7] Identifying transport mechanisms and bottlenecks is of particular relevance to the design of materials with improved performance. In an effort to improve mobility by controlling the micro- structure of the polymer, a family of poly(2,5- bis(3-alkylthiophen-2-yl)thieno[3,2-b]thiophenes, PBTTT) [8] was recently synthesized. When processed on self-assembled mono- layers such as octyltrichlorosilane (OTS) and heated into the liquid crystalline regime, thin films of PBTTT can achieve high room-temperature mobilities up to 0.7–1 cm 2 V 1 s 1 . [8,9] X-ray diffraction (XRD) strongly suggests that crystallites in PBTTT films are significantly more ordered than those found in thin films of other regio-regular poly(thiophenes) such as poly(3- hexyl-thiophene) (P3HT) or poly(3-3 000 -didodecylquarterthiophene) (PQT-12) [10–12] The superior electronic performance of annealed PBTTT films is attributed to a highly organized mesoscale morphology that arises from annealing the material through its liquid-crystalline phase. Indeed, atomic force microscopy (AFM) reveals the existence of large (a few hundred nm) terraces that are interpreted as crystalline grains. [13] As a result, transport across the film is thought to be greatly enhanced due to the lower areal density of grain-boundaries, which are known to impede charge transport. Furthermore, because of the liquid-crystalline nature of PBTTT, the regions between the crystalline domains are likely to have a more ordered morphology compared to that of other polymers. [8,14] To first order, transport in semicrystalline polymers can be understood as a combination of transport through a network of crystallites separated by defects that trap charge. If the regions between the crystallites are more ordered, mobility should be increased due to the correspondingly improved intergranular transport. Thus, according to the previous discussion, it is expected that PBTTT films exhibit a much lower trap density than films of P3HT or PQT-12, and such reduced trap density is the reason for the higher mobility in PBTTT. In this work, we investigate explicitly factors that limit charge transport in PBTTT transistors. We combine a study of charge transport in PBTTT thin films by thin-film transistor (TFT) measurements with structural and morphological characterization performed by AFM and transmission electron microscopy (TEM). Charge transport is analyzed using the mobility edge (ME) [6,7] model, which has been successfully applied to other semicrystalline polymers before. The great advantage of the ME model is that it allows us to deconvolute the effect of traps and estimate the mobility of the mobile charge in the film, thereby providing means to compare structure–property relationships between different polymers. TFTs were prepared in the bottom-gate staggered configura- tion. Highly doped silicon wafers with 200 nm of thermal oxide were used as substrates and were cleaned prior to undergoing UV irradiation in an ozone furnace for 20 min. Substrates were submerged in octadecyltrichlorosilane (OTS) to form a monolayer on the dielectric surface. Semiconducting polymers solutions, 0.5 wt% for both PBTTT with a C 14 alkyl chain (M w ¼ 70 kDa) and P3HT (M w ¼ 64 and 158 kDa) in 1,2-dichlorobenzene (DCB), were deposited on the substrates via spin-coating. Films of PBTTT were annealed at 180 8C for 10 min and, then, cooled down slowly through the mesophase region. To fabricate transistors, 80-nm-thick gold contacts were thermally evaporated COMMUNICATION www.MaterialsViews.com www.advmat.de [*] Prof. A. Salleo Materials Science and Engineering, 476 Lomita Mall 239 McCullough Building, Stanford, CA 94305 (USA) E-mail: asalleo@stanford.edu C. Wang Applied Physics, 476 Lomita Mall 213 McCullough Building, Stanford, CA 94305 (USA) L. H. Jimison, L. Goris Materials Science and Engineering, 476 Lomita Mall 213 McCullough Building, Stanford, CA 94305 (USA) Prof. I. McCulloch, Prof. M. Heeney Department of Chemistry, Imperial College of London South Kensington Campus London SW7 2AZ (UK) Dr. A. Ziegler Max-Planck Institute for Biochemistry Martinsried, D-82152, Germany DOI: 10.1002/adma.200902303 Adv. Mater. 2010, 22, 697–701 ß 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim 697