A BULK-DRIVEN CMOS OTA WITH 68 dB DC GAIN Jonathan Rosenfeld, Mücahit Kozak, and Eby G. Friedman Department of Electrical and Computer Engineering University of Rochester Rochester, New York 14627-0231 ABSTRACT An ultra-low voltage rail-to-rail operational transconductance amplifier (OTA) based on a standard digital 0.18 m CMOS process is described in this paper. Techniques for designing a 0.8 volt fully differential OTA are discussed including bias and ref- erence current generator circuits. To achieve rail-to-rail opera- tion, complementary input differential pairs are used, where the bulk-driven technique is applied to reduce the threshold limita- tion of the MOSFET transistors. The OTA gain is increased by using auxiliary gain boosting amplifiers. This additional circuitry enables the OTA to operate at 0.8 volts, achieving an open loop gain of 68 dB while consuming 94 W. The DC gain of the am- plifier is the highest gain achieved to date in bulk-driven amplifi- ers. * 1. INTRODUCTION The reduction in the minimum dimensions in VLSI technologies along with the trend of using small portable devices necessitates reduced power supply voltages. In order to facilitate submicro- meter high density systems on a single integrated circuit (IC), voltage levels must be lowered to ensure reliability. Threshold voltages of future CMOS technologies may not decrease much below what is available today, making it difficult to design ana- log circuits with lower supply voltages. In analog circuit design, the threshold voltage of a transistor should be lowered in proportion to the reduction in the supply voltage to appropriately bias the device. This characteristic makes standard low voltage analog circuits incompatible with CMOS technology trends. To combat this conflict without re- quiring the development of expensive CMOS technologies with lower threshold voltages, novel circuit design techniques must be developed that are compatible with future CMOS technologies. A promising approach in low voltage analog circuits is the so- called “bulk-driven” MOSFET method. In this method, the gate- to-source voltage is set to a value sufficient to form an inversion layer, and an input signal is applied to the bulk terminal. In this * This research was supported in part by the Semiconductor Research Corporation under Contract No. 2003-TJ-1068, the DARPA/ITO under AFRL Contract F29601-00-K-0182, the National Science Foundation under contract No. CCR-0304574, the Fullbright Program under Grant No. 87481764, grants from the New York State Office of Science, Tech- nology & Academic Research to the Center for Advanced Technology – Electronic Imaging Systems and to the Microelectronics Design Center, and by grants from Xerox Corporation, IBM Corporation, Intel Corpora- tion, Lucent Technologies Corporation, and Eastman Kodak Company. manner, the threshold voltage of a MOSFET can be reduced or even removed from the signal path. The concept of a bulk-driven MOS transistor was first proposed by Guzinski et al. in 1987 [1] as active components in an OTA differential input stage. Later, in 1991, the concept was used in the practical realization of a software-programmable CMOS tele- phone circuit [2]. However, not until 1998 [3] did the method draw significant attention as a viable low-voltage analog design technique. Specifically, in [3], a 1 volt Op Amp was designed in a standard CMOS digital process utilizing the depletion charac- teristics of bulk-driven transistors. One important drawback of the bulk-driven method, however, is that the body transconductance g mb is approximately five times smaller than the gate transconductance g m . Thus, when the input differential pair of an amplifier is composed of bulk-driven tran- sistors, the resulting DC gain is relatively low. This behavior is the primary reason for the low gain (around 45 dB) in previously reported bulk-driven amplifiers [3], [4]. In this paper, a 0.8 volt fully differential folded-cascode OTA is presented. Both PMOS and NMOS bulk-driven input differential pairs are used to achieve full rail-to-rail operation. A continuous- time common mode feedback circuit is adopted in order to sup- press variations in the output common mode. Four common- source gain boosting amplifiers are used to increase the gain to the target level of 68 dB (the DC gain was around 48 dB before gain boosting). This gain is the highest gain achieved to date in bulk-driven amplifiers. A bias circuitry which generates the re- quired bias voltages for the amplifier core along with a low sen- sitive reference current generator circuit are also presented This paper is organized as follows. The design of the amplifier core is presented in Section 2. In Section 3, the bias circuit and reference current generator are described. In Section 4, the circuit layout is presented. In section 5, the performance of the amplifier is summarized and some conclusions are offered in Section 6. 2. THE AMPLIFIER CORE The amplifier core of an OTA is illustrated in Figure 1. This circuit is based on a fully differential topology with two comple- mentary input pairs. The output branch consists of common gate amplifiers with cascode current loads to increase the gain. A common mode feedback circuit is used with four auxiliary com- mon source amplifiers. The operation of the OTA is explained in greater detail below. 2.1 Rail-to-Rail Operation Rail-to-rail operation is achieved using a pair of PMOS (M 5 and M 6 ) and NMOS (M 33 and M 34 ) transistors at the input stage. This 5 0-7803-8715-5/04/$20.00 ©2004 IEEE.