894 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 16, NO. 7, JULY 2008 Effective Radii of On-Chip Decoupling Capacitors Mikhail Popovich, Member, IEEE, Michael Sotman, Avinoam Kolodny, Member, IEEE, and Eby G. Friedman, Fellow, IEEE Abstract—Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have tradition- ally been allocated into the white space available on a die or placed inside the rows in standard cell circuit blocks. The efficacy of on-chip decoupling capacitors depends upon the impedance of the power/ground lines connecting the capacitors to the current loads and power supplies. A design methodology for placing on-chip decoupling capacitors is presented in this paper. A maximum effective radius is shown to exist for each on-chip decoupling capacitor. Beyond this effective distance, a decoupling capacitor is ineffective. Depending upon the parasitic impedance of the power distribution system, the maximum voltage drop seen at the current load is caused either by the first droop (determined by the rise time) or by the second droop (determined by the transition time). Two criteria to estimate the minimum required on-chip decoupling capacitance are developed based on the critical para- sitic impedance. In order to provide the required charge drawn by the load, the decoupling capacitor has to be charged before the next switching cycle. For an on-chip decoupling capacitor to be effective, both effective radii criteria should be simultaneously satisfied. Index Terms—Decoupling capacitors, power distribution sys- tems, power supply noise, signal integrity. I. INTRODUCTION T HE feature size of integrated circuits (ICs) has been aggressively reduced in the pursuit of improved speed, power, and cost. The scaling of CMOS is expected to continue for at least another decade. Future nanometer circuits will soon contain more than a billion transistors and operate at clock speeds well over 10 GHz [1]. Distributing robust and reliable power and ground voltages in such a high speed, high complexity environment is, therefore, a highly challenging task [2]. Decoupling capacitors are widely used to manage power supply noise. A decoupling capacitor acts as a reservoir of charge, which is released when the power supply voltage at Manuscript received January 23, 2007; revised March 23, 2007 and July 25, 2007. This research was supported in part by the Semiconductor Research Cor- poration under Contract 2004-TJ-1207, by the National Science Foundation under Contract CCR-0304574 and Contract CCF-0541206, by grants from the New York State Office of Science, Technology and Academic Research to the Center for Advanced Technology in Electronic Imaging Systems, and by grants from Intel Corporation, Eastman Kodak Company, Intrinsix Corporation, and Freescale Semiconductor Corporation. M. Popovich is with CDMA Technologies, Qualcomm Corporation, San Diego, CA 92121 USA (e-mail: mikhailp@qualcomm.com). E. G. Friedman is with the Department of Electrical and Computer En- gineering, University of Rochester, Rochester, NY 14627 USA (e-mail: friedman@ece.rochester.edu). M. Sotman and A. Kolodny are with the Department of Electrical Engi- neering, Technion—Israel Institute of Technology, Haifa 32000, Israel (e-mail: michael.sotman@intel.com; kolodny@ee.technion.ac.il). Digital Object Identifier 10.1109/TVLSI.2008.2000454 Fig. 1. Placement of an on-chip decoupling capacitor based on the maximum effective distance. To be effective, a decoupling capacitor should be placed close to the current load during discharge. During the charging phase, however, the decoupling capacitor should be placed close to the power supply to efficiently restore the charge on the capacitor. The specific location of a decoupling ca- pacitor should therefore be determined to simultaneously satisfy the maximum effective distances during discharge and during charging. a particular current load drops below some tolerable level. Alternatively, decoupling capacitors are an effective way to reduce the impedance of power delivery systems operating at high frequencies [3]. The location of the decoupling capacitors significantly affects the design of the power/ground (P/G) network in high performance ICs such as microprocessors. With increasing frequencies, a distributed hierarchical system of decoupling capacitors placed on-chip is needed to effectively manage the power supply noise [4]. The efficacy of decoupling capacitors depends upon the impedance of the conductors connecting the capacitors to the current loads and power sources. During discharge, the current flowing from the decoupling capacitor to the current load results in resistive noise ( drops) and inductive noise ( drops) due to the parasitic resistance and inductance of the power delivery network. The resulting voltage drop across the current load is therefore always greater than the voltage drop at the decoupling capacitor. A maximum parasitic impedance between the decoupling capacitor and the current load therefore exists for which the decoupling capacitor is effective. To be effective, a decoupling capacitor should therefore be placed close to a current load during discharge (within the maximum effective distance ), as shown in Fig. 1. Once the switching event is completed, charge on the decou- pling capacitor has to be restored before the next clock cycle begins. During the charging phase, the voltage across the decou- pling capacitor rises exponentially. The maximum frequency at which the decoupling capacitor is effective is determined by the parasitic resistance and inductance of the metal lines and the size of the decoupling capacitor. A maximum effective distance based on the charge time, therefore, exists for each on-chip de- coupling capacitor. Beyond this effective distance, the decou- pling capacitor is ineffective. Alternatively, to be effective, an on-chip decoupling capacitor should be placed close to a power 1063-8210/$25.00 © 2008 IEEE Authorized licensed use limited to: IEEE Xplore. Downloaded on April 12, 2009 at 11:08 from IEEE Xplore. Restrictions apply.