Feasible Evolutionary and Self-Repairing Hardware by means of the dynamic reconfiguration capabilities of the FIPSOC devices J.M. Moreno 1 , J. Madrenas 1 , J. Faura 2 , E. Cantó 1 , J. Cabestany 1 , J.M. Insenser 2 1 Universitat Politècnica de Catalunya, Dept. of Electronic Engineering, Building C4, Campus Nord, c/Gran Capità s/n, 08034 – Barcelona, Spain moreno@eel.upc.es 2 SIDSA, PTM, c/Isaac Newton 1, Tres Cantos, 28760 – Madrid, Spain faura@sidsa.es Abstract. In this paper we shall address the paradigms of evolutionary and self- repairing hardware using a new family of programmable devices, called FIPSOC (Field Programmable System On a Chip). The most salient feature of these devices is the integration on a single chip of a programmable digital section, a programmable analog section and a general-purpose microcontroller. Furthermore, the programmable digital section has been designed including a flexible and fast dynamic reconfiguration scheme. These properties provide an efficient framework for tackling the specific features posed by the emerging field of evolutionary computation. We shall demonstrate this fact by means of two different case studies: a self-repairing strategy for digital systems, suitable for applications in environments exposed to radiation, and an efficient implementation scheme for evolving parallel cellular machines. 1 Introduction During the last years, the field of programmable logic has evidenced an increasing interest in the addition of dynamic reconfiguration capabilities to conventional FPGA architectures [1]. This is due to the necessity to provide resources which should allow for handling efficiently such applications as programmable/customisable processors or co-processors, adaptive signal processing architectures or custom computing machines, among others. This has resulted in a variety of proposals, coming from both the academic [2] and industrial [3], [4], [5] communities. In this paper we shall concentrate our attention on the new family of devices introduced in [5], which is called FIPSOC (Field Programmable System On a Chip). The distinguishing characteristic of FIPSOC is the integration on a single device of an FPGA, a set of analog programmable cells and a standard microcontroller. Since there exists an efficient interface between the three sections of the device, it constitutes a natural platform for the prototyping and integration of mixed signal applications. Furthermore, a fast and efficient dynamic reconfiguration scheme has been included