IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 3, MARCH 2008 1175 Shunt Active-Power-Filter Topology Based on Parallel Interleaved Inverters Lucian Asiminoaei, Member, IEEE, Eddy Aeloiza, Student Member, IEEE, Prasad N. Enjeti, Fellow, IEEE, and Frede Blaabjerg, Fellow, IEEE Abstract—In this paper, an interleaved active-power-filter con- cept with reduced size of passive components is discussed. The topology is composed of two pulsewidth-modulation interleaved voltage-source inverters connected together on the ac line and sharing the same dc-link capacitor. The advantages of the pro- posed approach are as follows: 1) significant reduction in the linkage inductors’ size by decreasing the line-current ripple due to the interleaving; 2) reduction of the switching stress in the dc-link capacitor, due to the shared connection; and 3) more accurate compensation for high-power applications, because the power sharing allows one to use a higher switching frequency in each inverter. This paper analyzes the design of the passive components and gives a practical and low-cost solution for the minimization of the circulation currents between the inverters, by using common-mode coils. Several simulation results are dis- cussed, and experimental results with a three-phase 10-kVA 400-V unit are obtained to validate the theoretical analysis. Index Terms—Active filters, interconnected power systems, power-system harmonic, pulsewidth-modulated (PWM) inverters, reactive power. I. I NTRODUCTION A COMMON solution for harmonic compensation in large industrial plants is to mitigate the harmonic currents at the point of common coupling, by using either passive or active methods [1]. As a passive method may create problems with uncontrolled resonances between the capacitor and the existent source impedance [2], a more efficient way is by using active- filtering methods. However, the harmonic compensation using active solutions for high-power applications is usually limited by the available semiconductor technology due to the maximum current and voltage ratings, losses, and switching frequency. In order to cope with high-power requirements, several solutions, such as hybrid topologies [3]–[6], multilevel structures [7], [8], and paralleled inverters [9]–[14], are proposed in the literature. Paralleling multiple inverters makes the design, production, installation, and maintenance much simpler and more flexible. In addition, it is easier to extend the total rated power of an Manuscript received May 12, 2006; revised August 10, 2007. This work was supported by Aalborg University, Aalborg, Denmark under Project 562/06-14- 23632. L. Asiminoaei is with Danfoss Drives A/S, 6300 Graasten, Denmark (e-mail: las@danfoss.com). E. Aeloiza is with Toshiba International Corporation, Houston, TX 77041 USA (email: eaeloiza@gmail.com). P. N. Enjeti is with the Department of Electrical Engineering, Texas A&M University, College Station, TX 77843 USA (e-mail: enjeti@tamu.edu). F. Blaabjerg is with the Faculty of Engineering, Science, and Medicine, Aalborg University, 9220 Aalborg East, Denmark (e-mail: fbl@iet.aau.dk). Digital Object Identifier 10.1109/TIE.2007.907671 Fig. 1. Principle diagram of paralleling n multiple power inverters for a shunt APF implementation. All inverters share the same capacitor C dc . active power filter (APF) by simply adding a new module. Furthermore, the parallel inverters may be physically realized in a modular implementation, which has an intrinsic redundancy advantage. Thus, it provides a ride-through capability when a module fails and, also, much simpler replacement procedures. If one of the modules fails (Fig. 1), the rest still provides the harmonic-current compensation, within certain limits. These features are highly desired in the industry when a clean electric- distribution system is desired. This paper analyzes the application of the (two) parallel inter- leaved inverters for harmonic-current compensation with APFs. The topology consists of a parallel connection of two identical three-phase interleaved pulsewidth-modulation (PWM) invert- ers, sharing the same dc-capacitor as shown in Fig. 2. Akagi et al. [15] proposed a similar structure for the dc side, but the ac side includes a power transformer for galvanic isolation. However, an isolation transformer has a bulky design and determines larger power losses since it has to support the nominal current of the APF. Furthermore, the transformer is an expensive component, since for APF applications, it has to be designed of a high bandwidth according to the maximum compensated harmonic current. On the other hand, removing the transformer and connecting the inverters directly on the ac side, as shown in Fig. 1, could contribute to circulation currents between the inverters [16]. The approach proposed an effective low-cost method to min- imize the circulation currents by installing common-mode in- ductors on each inverter. The results obtained show that the use of the common-mode inductors reduces the circulation currents to the desired limits. This paper describes several design aspects of the proposed topology and discusses its advantages and 0278-0046/$25.00 © 2008 IEEE