NANOELECTRONICS Low-frequency noise in polymer thin-film transistors O. Marinov, M.J. Deen, J. Yu, G. Vamvounis, S. Holdcroft and W. Woods Abstract: The low-frequency noise (LFN) properties of the polymer field effect transistors (PFETs) using polymer semiconducting material are investigated and discussed in terms of the charge carrier transport. Results obtained from several research groups are summarised. A general trend of proportionality between noise power density and the DC power applied to the PFET channel is observed in the data from publications. This trend implies that the mobility fluctuation in the PFET is the dominant noise source. 1 Introduction Polymer-based field effect transistors (PFETs) have been increasingly investigated in the past three decades [1, 2]. This is in an effort to realise inexpensive polymer thin-film transistors (PTFTs) that can be used in some niche commercial applications, such as electronic tags, drivers in active matrix displays or for sensing applications. However, large variations in experimental data are observed in PTFTs, and this is discussed later. A preliminary version of this paper [3] was presented at the SPIE Fluctuation and Noise Symposium (2003). Test structures of PTFTs are usually fabricated in either of the configurations, shown in Fig. 1 with the source/drain (S/D) contacts either below (Fig. 1a) or above (Fig. 1b) the semiconducting polymer film. The degenerately doped substrate serves as the gate electrode for the test devices studied here. In this work, we present our experimental results for PFETs of bottom contact configuration (Fig. 1a), using regio-regular poly(3-alkylthiophene) poly- mers (P3AT) with different alkyl chain lengths, as depicted in Fig. 2. We found that the results are similar to recently published data [4–6] from several research groups for field effect transistors with different semiconductors, such as pentacene, F-CuPC and DHa5 T. The P3AT polymers in our samples were regio-regular with head-tail ratio495%, and spin coated from solutions of chloroform (spectro grade, Caldon) with 2 mg/ml and 4 mg/ml polymer concentration. The polymer was deposited by spin coating at several rates, 1000, 2000, 3000 rpm. In the absence of light and under vacuum, the deposited films were annealed at 1401C and then cooled down slowly (overnight) under nitrogen to room temperature. According to [2], the first polymer TFT with a gate- controlled drain–source current was fabricated in 1983 using polyacetylene (CH) x as the semiconducting material in S/D top contact configuration [7]. As shown in Fig. 3, the gate dependence of the drain current I D was small when compared to the conductance between the drain and source electrodes. However, from the C–V characteristics, it was deduced that the field-dependent part of I D is due to carrier accumulation/depletion of the polymer film at the gate– insulator interface, and that the charge transport is similar to that in inorganic metal–insulator (oxide)–semiconductor (MIS or MOS) transistors. This deduction was accepted in several succeeding investigations of PFETs and researchers began using the MOS transistor theories for description and explanation of polymer transistor operation. For example, it is expected that the drain current I D can be described as a function of the gate voltage (V GS ) and drain voltage (V DS ), as given by (1) and (2) for linear and saturation modes of the PFET operation, respectively. I D ¼ W L m  C I V GS  V T  V DS 2   V DS ; for linear mode; if V DS  V GS  V T ð1Þ I D ¼ W L m  C I 2 ðV GS  V T Þ 2 ; for saturation mode; if V DS  V GS  V T ð2Þ Here W and L are the width and length of the PFET channel, m is the charge carrier mobility in the PFET channel, C I is the gate–insulator capacitance per unit area and V T is the threshold voltage. The deviation from these relations (1) and (2) is often attributed to imperfection of the organic material and the TFT structure, and it is believed that it can be remedied by introducing additional terms, such as drain–source con- ductance G DS.LEAK for leakage in the bulk of organic material [8–10], drain and/or source resistance (R D and/or R S ) and junctions for electrode–organic access contact insulator gate d source drain polymer gate source d insulator drain polymer a b Fig. 1 Typical test TFT structures for PFETs a Bottom contact configuration b Top contact configuration O. Marinov and M.J. Deen are with the Electrical and Computer Engineering Department, McMaster University, Hamilton, Ontario, L8S 4K1, Canada J. Yu, G. Vamvounis and S. Holdcroft are with the Department of Chemistry, Simon Fraser University, Vancouver, BC, V5A 1S6, Canada W. Woods is with the School of Engineering Science, Simon Fraser University, Vancouver, BC, V5A 1S6, Canada r IEE, 2004 IEE Proceedings online no. 20040916 doi:10.1049/ip-cds:20040916 Paper received 18th September 2003. Originally published online: 17th August 2004 466 IEE Proc.-Circuits Devices Syst., Vol. 151, No. 5, October 2004