244 IETE TECHNICAL REVIEW | VoL 25 | ISSUE 5 | SEP-oCT 2008 Impact of Lateral Nonuniform Doping and Hot Carrier Injection on Capacitance Behavior of High Voltage MOSFETs Yogesh Singh Chauhan, Renaud Gillon 1 , Michel Declercq 2 and Adrian Mihai Ionescu 2 Semiconductor Research and Development Center, IBM, Bangalore 560024, India. 1 AMI Semiconductor (AMIS), oudenaarde, Belgium. 2 Electronics Laboratory (LEG), Institute of Microelectronics and Microsystems (IMM), Ecole Polytechnique Federale de Lausanne (EPFL), CH-1015, Lausanne, Switzerland. Abstract A detailed analysis of capacitance behavior of high-voltage MOSFET (HV-MOS), for example, LDMOS, using device simulation is made. The impact of lateral nonuniform doping and drift region are separately analyzed. It is shown that the peaks in C GD and C GS capacitances of HV-MOS originate from lateral nonuniform doping. The peak value of C DG capacitance can be higher than WLC ox for nonzero drain biases. The drift region de- creases the C GD capacitance and increases the peaks in C GS in strong inversion and also gives rise to peaks in C GG capacitances increasing with higher drain bias. It is also shown that trapped charge due to hot carrier injection modulates the peaks’ amplitude and position in capacitances depending on hot hole or electron injection at drain or source side. This capacitance analysis will facilitate in optimization of the HV-MOS struc- ture and also help in modeling of HV-MOS, including the hot carrier degradation. Keywords: Capacitance, Drift region, High voltage MOSFET, Hot carrier injection, Lateral nonuniform doping, LDMOS, VDMOS. 1. Introduction The interest in the high-voltage (HV) MOS devices, e.g., lateral double diffused MOS (LDMOS), vertical double diffused MOS (VDMOS), has dramatically increased ever since these devices were integrated with the low-power modules in MOS technology. Today, HV-MOS devices are extensively used in all kinds of integrated power circuits, like switch-mode power supplies, motor driv- ers, and power amplifiers. In addition, LDMOS devices processed in thin-film silicon-on-insulator (SOI) provide a new and attractive technology for smart power-inte- grated circuits in consumer and automotive applications [1]. Figure 1 shows the industrial LDMOS device from AMI semiconductor. The PBODY under gate acts as MOSFET, while NTUB under gate and NWELL region act as drift regions. The drift region is used to sustain the HV applied at drain terminal, which in turn, increases the breakdown voltage of the transistor. The special behavior of HV-MOS capacitances has been under study in research community for several years [2]–[5]. In literature, generally, the HV-MOS capacitances have been studied together with drift region [5], [6], which makes it difficult to separately understand and analyze the impact of lateral nonuniform doping and drift region. The lateral asymmetric devices have also caught attention in deep submicron devices for higher performance in analog, RF, and mixed signal designs [4], [7]. In fact, lateral nonuniform doping is inherent in halodoped nano-MOSFETs [8], [9]. The unique behavior of C GD in HV-MOS has been analyzed in detail, in the literature [2], [3], and [6]. Frere et al. [2] showed that the peaks in C GD are actually originating from lateral non- uniformly doped or lateral asymmetric MOS (LAMOS). Liu et al. [6] reproduced the peaks in C GD of VDMOS transistor using small signal analysis. Recently, Yuan et al. [10] have experimentally shown the effect of hot carrier degradation on LDMOS transistor. In this paper, the results of [11] are elaborated. Using finite element device simulator DESSIS (from synop- sys), we will discuss individually the effect of lateral nonuniform doping and drift region to understand the HV-MOS capacitance behavior. To analyze the capaci- tance behavior of HV-MOS, we will divide our analysis in two parts: impact of lateral nonuniform doping and drift region. For this, we will have three cases [Figure 2]: (1) conventional MOS with uniform doping in the channel, (2) LAMOS with lateral doping gradient in the channel, and (3) LAMOS with a drift region to sustain HV. We will also discuss the effect of hot carrier degradation on capacitances, where it will be shown that trapped charge can drastically change the capacitance behavior of conventional MOS and HV-MOS. [Downloaded free from http://www.tr.ietejournals.org on Wednesday, December 24, 2008]